Abstract: This invention discloses a DMOS power device supported on a substrate of a first conductivity type functioning as a drain. The DMOS power device includes a polysilicon-over-double-gate-oxide gate disposed on the substrate includes a polysilicon layer disposed over a double-gate-oxide structure having a central thick-gate-oxide segment surrounded by a thin-gate-oxide layer with a thickness of about one-fourth to one-half of a thickness of the thick-gate-oxide segment. The DMOS power device further includes a body region of a second conductivity type disposed in the substrate underneath the thin-gate-oxide layer around edges of the central thick-gate-oxide segment the body region extending out laterally to a neighboring device circuit element. The DMOS power device further includes a source region of the first conductivity type disposed in the substrate encompassed in the body region having a portion extending laterally underneath the thin-gate-oxide layer.

Abstract: A new transistor cell is disclosed in this invention which is formed in a semiconductor substrate with a drain region of a first conductivity type formed at a bottom surface of the substrate. The DMOS cell includes a polysilicon layer constituting a gate supported on a top surface of the substrate, the gate surrounding and defining an outer boundary of the transistor cell having a removed polysilicon opening disposed substantially in a central portion of the cell. The DMOS cell further includes a source region of the first conductivity disposed in the substrate near edges of the removed polysilicon opening with a portion extends underneath the gate. The DMOS cell further includes a body region of a second conductivity type disposed in the substrate occupying an entire region under the removed polysilicon opening thus encompassing the source region and having a portion extends underneath the gate.

Abstract: This invention discloses a DMOS planar power device having a plurality of transistor cells formed in a semiconductor substrate with a drain region of a first conductivity type disposed at a bottom surface of the substrate. Each of the DMOS transistor cells includes a polysilicon segment constituting a gate supported on a top surface of the substrate wherein the gate being disposed substantially in a center portion of the transistor cell. The DMOS transistor cell further includes a source region of the first conductivity type disposed in the substrate surrounding edges of the gate with a portion extends underneath the gate. The DMOS transistor cell further includes a body region doped with a body dopant of a second conductivity type disposed in the substrate encompassing the source region.