Abstract: The invention relates to a circuit plate for the optimal decoupling of circuits with digital integrated circuits. The plate is connected to an SMD capacitor and two conductor tracks connected to the capacitor and leading to the points to be decoupled. The plate is fittable with all precision contact connections present. Furthermore, the plate is adapted to the shape of the IC's or the IC base and, in each case, has a number of bores conforming to the number of contact pins of the IC's or to the number of contact connections of the IC base, whereby the conductor tracks leading to the SMD capacitor are relatively wide and lead to the connections of the points to be decoupled.