Abstract: Process for the manufacture of MOS devices by providing wafer of P-semiconductor grade silicon in a deposition reactor. The wafer is heated to a temperature of approximately 950.degree. C. while subjecting the wafer to dry oxygen gas to produce between a very thin layer (50-250A) of silica (SiO.sub.2) on a surface of the wafer. While elevating the temperature of the wafer to approximately 1000.degree. C., the chamber is purged with nitrogen and then hydrogen gas. After an introduction of carbon dioxide gas into the chamber, silane (SiH.sub.4) or dichlorosilane gas is bled into the chamber. The silane reacts with the CO.sub.2 to deposit SiO.sub.2 on the previously formed thermal SiO.sub.2. The two layers of SiO.sub.2 may then be annealed to provide a highly coherent, defect-free gate oxide for MOS integrated circuits.