Abstract: A method of forming a graded dielectric layer on an underlying layer including flowing a mixture of a silicon-carbon containing gas, an oxygen containing gas and a carrier gas through a showerhead comprising a blocking plate and a faceplate to form an oxide rich portion of the graded dielectric layer, where the silicon-carbon containing gas has an initial flow rate, flowing the silicon-carbon containing gas at a first intermediate flow rate for about 0.5 seconds or longer, where the first intermediate flow rate is higher than the initial flow rate, and flowing the silicon-carbon containing gas at a fastest flow rate higher than the first intermediate flow rate to form a carbon rich portion of the graded dielectric layer.

Abstract: A bonded multi-layer RF window may include an external layer of dielectric material having desired thermal properties, an internal layer of dielectric material exposed to plasma inside a reaction chamber, and an intermediate layer of bonding material between the external layer and the internal layer. Heat produced by the chemical reaction inside the chamber and by the transmission of RF energy through the window may be conducted from the internal layer to the external layer, which may be cooled during a semiconductor wafer manufacturing process. A bonded multi-layer RF window may include cooling conduits for circulating coolant to facilitate cooling of the internal layer; additionally or alternatively, gas distribution conduits and gas injection apertures may be included for delivering one or more process gases into a reaction chamber. A system including a plasma reaction chamber may employ the inventive bonded multi-layer RF window.

Abstract: A heat transfer assembly having a heat spreading member sandwiched between a heat source and a heat sink is disclosed. The heat sink, the heat spreading member, and the heat source are pressed against the bottom of a substrate support plate by a bias member.

Abstract: An article of manufacture comprising an optical-ready substrate made of a first semiconductor layer, an insulating layer on top of the first semiconductor layer, and a second semiconductor layer on top of the insulating layer, wherein the second semiconductor layer has a top surface and is laterally divided into two regions including a first region and a second region, the top surface of the first region being of a quality that is sufficient to permit microelectronic circuitry to be formed therein and the second region including an optical signal distribution circuit formed therein, the optical signal distribution circuit made up of interconnected semiconductor photonic elements and designed to provide signals to the microelectronic circuit to be fabricated in the first region of the second semiconductor layer.

Abstract: A composition comprising at least one silane possessing an unsaturated organic function; at least two free radical initiators, and a process for producing silane-crosslinked thermoplastic polymers comprising providing a cross-linkable compound; at least one thermoplastic polymer; and, reacting the crosslinkable compound under reactive mechanical-working conditions and exposing the crosslinkable compound to moisture to provide crosslinked thermoplastic polymers.

Abstract: A process for imparting controlled oxygen precipitation behavior to a single crystal silicon wafer. Specifically, prior to formation of the oxygen precipitates, the wafer bulk comprises dopant stabilized oxygen precipitate nucleation centers. The dopant is selected from a group consisting of nitrogen and carbon, and the concentration of the dopant is sufficient to allow the oxygen precipitate nucleation centers to withstand thermal processing, such as an epitaxial deposition process, while maintaining the ability to dissolve any grown-in nucleation centers.

Abstract: A valve control system for a semiconductor processing chamber includes a system control computer and a plurality of electrically controlled valves associated with the processing chamber. The system further includes a programmable logic controller in communication with the system control computer and operatively coupled to the electrically controlled valves. The refresh time for control of the valves may be less than 10 milliseconds. Consequently, valve control operations do not significantly extend the period of time required for highly repetitive cycling in atomic layer deposition processes. A hardware interlock may be implemented through the output power supply of the programmable logic controller.

Abstract: An apparatus that includes a rotatable single wafer holding bracket with one or more wafer supports disposed on the single wafer holding bracket, wherein the one or more wafer supports position a center of a wafer to be off-center from an axis of rotation of the single wafer holding bracket.

Abstract: A method of film deposition in a sub-atmospheric chemical vapor deposition (CVD) process includes (a) providing a model for sub-atmospheric CVD deposition of a film that identifies one or more film properties of the film and at least one deposition model variable that correlates with the one or more film properties; (b) depositing a film onto a wafer using a first deposition recipe comprising at least one deposition recipe parameter that corresponds to the at least one deposition variable; (c) measuring a film property of at least one of said one or more film properties for the deposited film of step (b); (d) calculating an updated deposition model based upon the measured film property of step (c) and the model of step (a); and (e) calculating an updated deposition recipe based upon the updated model of step (d) to maintain a target film property. The method can be used to provide feedback to a plurality of deposition chambers or to control a film property other than film thickness.

Abstract: A substrate is chemical mechanical polished with a high-selectivity slurry until the stop layer is at least partially exposed, and then the substrate is polished with a low-selectivity slurry until the stop layer is completely exposed.

Abstract: A crystal pulling apparatus for producing a silicon crystal ingot having a reduced amount of metal contamination. The apparatus includes a growth chamber and a component disposed within the growth chamber having a protective layer of silicon nitride for preventing metal contamination of the crystal.

Abstract: A method of forming a polishing pad with a polishing layer having a polishing surface and a back surface. A plurality of grooves are formed on the polishing surface, and an indentation is formed in the back surface of the polishing layer. A region on the polishing surface corresponding to the indentation in the back surface is free of grooves or has shallower grooves.

Abstract: Methods and apparatus are provided for calibrating inkjet print nozzles that include dispensing a plurality of ink drops onto a surface with one or more inkjet print nozzles at a firing pulse voltage, measuring a parameter of the ink drops, and calibrating the firing pulse voltage of at least one of the one or more inkjet print nozzles based on the measured parameter of the ink drops.

Abstract: A method of etching high dielectric constant materials using a halogen gas, a reducing gas and an etch rate control gas chemistry.

Abstract: Methods and compositions are provided for planarizing substrate surfaces with low dishing. Aspects of the invention provide methods of using compositions comprising an abrasive selected from the group consisting of alumina and ceria and a surfactant for chemical mechanical planarization of substrates to remove polysilicon.

Abstract: Tantalum precursors useful in depositing tantalum nitride or tantalum oxides materials on substrates, by processes such as chemical vapor deposition and atomic layer deposition. The precursors are useful in forming tantalum-based diffusion barrier layers on microelectronic device structures featuring copper metallization and/or ferroelectric thin films.

Abstract: A method and apparatus for chemical mechanical polishing includes a platen supports a polishing article, a robot located proximate the platen, a carrier head having a retaining ring, and a carrier heads support mechanism. The robot is configured to position a substrate on the polishing article, and the carrier heads support mechanism is configured to move the carrier head into a position that the retaining ring surrounds the substrate.

Abstract: A method of depositing a gate dielectric layer for a thin film transistor is provided. The gate dielectric layer is deposited using a plasma enhanced deposition with a gas mixture comprising a silicon and chlorine containing compound.

Abstract: Polishing pads with a window, systems containing such polishing pads, and processes that use such polishing pads are disclosed.