Patents Assigned to Matrox Electronics Systems Limited
  • Error disbursing format for digital information and method for organizing same
    Patent number: 4802170
    Abstract: Multiple stage interleaving through a memory matrix is utilized to separate adjacently disposed bits from bytes of digital information, in a reorganized bit stream. At least two stages of interleaving are required for the preferred embodiments of the invention which achieves a bit separation distance equal to the bit capacity of a plurality of either the matrix columns or rows, with that plurality being the number of adjacently disposed bits in each byte of digital information.
    Type: Grant
    Filed: April 29, 1987
    Date of Patent: January 31, 1989
    Assignee: Matrox Electronics Systems Limited
    Inventor: Lorne Trottier