Patents Assigned to MATSUE ELMEC CORPORATION
  • Publication number: 20170092417
    Abstract: A common mode filter suppressing a reflection of a common mode noise and sufficiently removing the common mode noise of 2 GHz or less includes: a signal coil spirally formed in a dielectric layer of a multilayer structure, and serially inserted and connected to one of the differential signal lines; a signal coil inserted and connected to the other differential signal line and formed in the dielectric layer so as to face the signal coil through the dielectric layer; a control coil formed in the dielectric layer so as to be sandwiched between the first and second signal coils interposing the dielectric layer and wound in the same direction as the signal coil; and an embedded resistor connected to at least one of an outer peripheral end or an inner peripheral end of the control coil, thus forming a feedback loop circuit by the control coil and the embedded resistor.
    Type: Application
    Filed: May 27, 2014
    Publication date: March 30, 2017
    Applicant: MATSUE ELMEC CORPORATION
    Inventor: Masaaki Kameya
  • Patent number: 9419680
    Abstract: Series resistance Rs is connected in series between an input terminal 1 and an output terminal 3, and a resonant circuit 11 including an inductor L1 and a capacitor C1, and a resonant circuit 13 including an inductor L3 and a capacitor C3 are connected between the input terminal 1 and the output terminal 3, in parallel to the series resistance Rs. One end of a shunt resistance R1 is connected to a connection point P1 of the inductor L1 and the capacitor C1, and the other end is connected to a ground destination. One end of a shunt resistance R3 is connected to a connection point P3 of the inductor L3 and the capacitor C3, and the other end is connected to the ground destination.
    Type: Grant
    Filed: December 11, 2014
    Date of Patent: August 16, 2016
    Assignee: MATSUE ELMEC CORPORATION
    Inventor: Masaaki Kameya
  • Patent number: 9401688
    Abstract: A first meander line 1A is formed on one surface of a first dielectric layer 9A, with one end as a signal input position, and the other end connected to a first termination resistance 5A, and a second meander line 1C facing the first meander line 1A is formed on a surface facing the first dielectric layer 9A, and the second meander line 1C is formed, with one end positioned at the other end side of the first meander line 1A as a signal output position, and the other end connected to a second termination resistance 5C, and a first conductor line 3A is formed on the side facing the first dielectric layer 9A, with one end connected to the signal input position and the other connected to the signal output position, and a dividing section in a middle of the first conductor line 3A is connected by a first series resistance 7A.
    Type: Grant
    Filed: December 10, 2012
    Date of Patent: July 26, 2016
    Assignee: MATSUE ELMEC CORPORATION
    Inventor: Masaaki Kameya
  • Publication number: 20150288341
    Abstract: A first meander line 1A is formed on one surface of a first dielectric layer 9A, with one end as a signal input position, and the other end connected to a first termination resistance 5A, and a second meander line 1C facing the first meander line 1A is formed on a surface facing the first dielectric layer 9A, and the second meander line 1C is formed, with one end positioned at the other end side of the first meander line 1A as a signal output position, and the other end connected to a second termination resistance 5C, and a first conductor line 3A is formed on the side facing the first dielectric layer 9A, with one end connected to the signal input position and the other connected to the signal output position, and a dividing section in a middle of the first conductor line 3A is connected by a first series resistance 7A.
    Type: Application
    Filed: December 10, 2012
    Publication date: October 8, 2015
    Applicant: MATSUE ELMEC CORPORATION
    Inventor: Masaaki Kameya
  • Publication number: 20150171920
    Abstract: Series resistance Rs is connected in series between an input terminal 1 and an output terminal 3, and a resonant circuit 11 including an inductor L1 and a capacitor C1, and a resonant circuit 13 including an inductor L3 and a capacitor C3 are connected between the input terminal 1 and the output terminal 3, in parallel to the series resistance Rs. One end of a shunt resistance R1 is connected to a connection point P1 of the inductor L1 and the capacitor C1, and the other end is connected to a ground destination. One end of a shunt resistance R3 is connected to a connection point P3 of the inductor L3 and the capacitor C3, and the other end is connected to the ground destination.
    Type: Application
    Filed: December 11, 2014
    Publication date: June 18, 2015
    Applicant: MATSUE ELMEC CORPORATION
    Inventor: Masaaki Kameya
  • Patent number: 8847705
    Abstract: There is provided a common mode filter capable of allowing an ultrahigh speed differential signal to transmit and hardly allowing a common mode noise to transmit, comprising: a lumped-constant differential delay line DL formed by arranging inductors Lo, being passive series elements, and capacitors Co, being passive parallel elements, in a ladder-shaped differential four terminal network composed of the passive series elements and the passive parallel elements arranged in the differential lines 1, 3. In the lumped-constant differential delay line DL, the capacitors Co, being the parallel elements, are formed of two capacitors connected in series equivalent to each other and having same values with each other such as Co/2 and Co/2, or Co and Co.
    Type: Grant
    Filed: October 13, 2010
    Date of Patent: September 30, 2014
    Assignee: Matsue Elmec Corporation
    Inventor: Masaaki Kameya
  • Publication number: 20120075036
    Abstract: There is provided a common mode filter capable of allowing an ultrahigh speed differential signal to transmit and hardly allowing a common mode noise to transmit, comprising: a lumped-constant differential delay line DL formed by arranging inductors Lo, being passive series elements, and capacitors Co, being passive parallel elements, in a ladder-shaped differential four terminal network composed of the passive series elements and the passive parallel elements arranged in the differential lines 1, 3. In the lumped-constant differential delay line DL, the capacitors Co, being the parallel elements, are formed of two capacitors connected in series equivalent to each other and having same values with each other such as Co/2 and Co/2, or Co and Co.
    Type: Application
    Filed: October 13, 2010
    Publication date: March 29, 2012
    Applicant: MATSUE ELMEC CORPORATION
    Inventor: Masaaki Kameya