Patents Assigned to Matsushita Electonics Corporation
  • Patent number: 5591663
    Abstract: A manufacturing method of a semiconductor device comprises the steps:(a) forming a ferroelectric capacitor on a semiconductor substrate on which a MOS transistor is formed, (b) forming an interlayer insulating film which covers the whole semiconductor substrate, (c) forming first contact holes which reach diffusion layers of the MOS transistor, (d) after forming the first contact holes, providing a heat treatment in hydrogen atmosphere, (e) after the heat treatment, forming second contact holes which reach upper and lower electrodes of the ferroelectric capacitor on the interlayer insulating film, and (f) forming metal interconnection. Since the heat treatment in hydrogen atmosphere is provided before forming the second contact holes, a surface state density at interface between the semiconductor and a gate insulating film of the MOS transistor can be lowered without degrading the characteristics of ferroelectric capacitor.
    Type: Grant
    Filed: February 14, 1995
    Date of Patent: January 7, 1997
    Assignee: Matsushita Electonics Corporation
    Inventors: Toru Nasu, Atsuo Inoue, Yoshihisa Nagano, Akihiro Matsuda, Koji Arita