Abstract: A microcomputer for automatically controlling the sound in an audio or audio-visual system. Incoming audio signals from multiple channels are combined and fed to a pair of detector-rectifier circuits. One detector-rectifier circuit is a smoothing circuit with a time constant longer than that of the other detector-rectifier circuit. The signals with a longer time constant are fed to the microprocessor to control the volume function of an audio or audio-visual system. The signals with a shorter time constant are fed to the microprocessor to equalize the source frequency spectrum of an audio or audio-visual system.

Abstract: A vacuum cleaner includes a housing having a nozzle assembly and a handle. An agitator brush is mounted for relative rotation on the nozzle assembly. A motor and fan subassembly are mounted in the housing. A three position control switch is carried on the handle. The control switch is selectively positionable in an off position, a continuously on position and an automatic on/off touch control position whereby the motor is activated by squeezing the control switch assembly and deactivated by releasing the control switch assembly.

Abstract: A vacuum cleaner is provided including a nozzle assembly, an agitator brush mounted for relative rotation on the nozzle assembly, a motor and fan assembly carried on the vacuum cleaner and a handle and canister assembly pivotally mounted to the nozzle assembly. The handle and canister assembly includes a cavity for holding a dust bag, a removable access door for accessing the cavity and a retention flap across the corner of the access opening for engaging and retaining the dust bag fully in the cavity when the access door is installed following dust bag replacement. Preferably, one retention flap is provided at each corner of the access opening.

Abstract: An electric vacuum cleaner includes a canister housing having an internal chamber and a suction inlet and an exhaust outlet both communicating with that chamber. The vacuum cleaner also includes a suction generator and dust collector both held in the internal chamber. Further, the vacuum cleaner includes a nozzle for picking up dirt and debris and a motor driven agitator and drive motor carried on that nozzle. Finally, a hose and wand assembly are provided. The wand assembly provides fluid communication between the outlet of the nozzle and the hose leading to the suction inlet of the canister housing. The wand assembly includes respective first and second telescoping tubes constructed from metal, an electrical conductor and a telescoping insulator assembly including a channel for receiving and holding the electrical conductor in substantially any respective position of the first and second telescoping tubes.

Abstract: A vacuum cleaner includes a housing, a nozzle for picking up dirt and debris, and a vacuum generator. The vacuum generator includes a motor and drive shaft, a first fan connected to the drive shaft, a shield including a recess that functions as an air induction chamber for receiving the fan, and an air inlet port formed in the shield. A pathway provides fluid communication between the nozzle and the vacuum generator. A dirt and debris collector in the form of a dust bag is provided in the pathway between the nozzle and the vacuum generator. The vacuum cleaner also includes an infuser that is carried on the shield about the air inlet port. The infuser directs air into the induction chamber in a more efficient manner to improve vacuum cleaner performance.

Abstract: A vacuum cleaner (10) includes a housing (14), an agitator brush (40) mounted for relative rotation in the housing (14) and a motor (30) including a shaft (42) for driving the agitator brush (40). A flexible belt (44) connects the drive shaft (42) of the motor (30) to the agitator brush (40). Further, a mechanism (50) is provided for disconnecting the belt (44) from either the motor drive shaft (42) or the agitator brush (40). That mechanism (50) includes an element or lug (54) carried on a shifter (52) and an actuator (56) for selectively displacing the shifter (52) and element/lug (54) carried thereon between a first position wherein the element/lug (54) is out of engagement with said belt (44) and a second position wherein the element/lug (54) engages the belt (44), thereby forcing the belt (44) out of engagement with either the motor drive shaft (42) or the agitator brush (40).

Abstract: A vacuum cleaner is provided including a nozzle assembly and a handle pivotally connected to the nozzle assembly. The handle includes a cavity for holding a fan and motor assembly and a dust bag. A main door on the handle is operable to gain access to the dust bag in the cavity. A final filtration compartment is carried on the main door. The final filtration compartment includes a separate access door that is received in the front face of the main door and fits flush therewith.

Abstract: An extractor is provided for cleaning carpet or a like surface or material. The extractor includes a housing, a handle, a cleaning liquid delivery system and a cleaning liquid recovery system. The cleaning liquid delivery system includes a cleaning liquid supply tank, first and second aligned agitators preferably in the form of brushes and a gravity feed or pump for delivering cleaning liquid from the supply tank for cleaning. The cleaning liquid recovery system includes a recovery nozzle, a vacuum generator and a dirty cleaning liquid recovery tank. The extractor is further characterized by a manifold for receiving cleaning liquid from the pump and directing the cleaning liquid into a nip defined between the first and second agitators. A drive assembly counterrotates the agitators so that relative rotation of the agitators in the nip is generally away from the manifold and toward the carpet to be cleaned.

Abstract: An apparatus or transforming the resolution of an image from a first image resolution to a second image resolution using operations in the spatial frequency domain. The apparatus converts the bit-stream format which defines the first image and can be used to, for example, change the resolution of an MPEG encoded video signal by converting the MPED bitstream. The apparatus generates converted macroblocks from original macroblocks. During conversion, the apparatus determines whether the converted macroblock is (1) intra or non-intra coded, (2) P-coded or B-coded, and (3) in field format or frame format. The apparatus may also include the selection of a motion vector for the converted macroblock from the original macroblocks. Further, the apparatus may also map a first group of transform values which represent the image at the first image resolution to a second group of transform values which represent the image the second image resolution in the spatial frequency domain.

Abstract: A method and device for receiving and storing an electronic television (TV) program guide. In a satellite, cable or broadcast TV system, electronic TV program guides may be coded into the video signals received by the TV receiver. Many currently available TV receivers also allow users to program a list of "select-channels." When the receiver is in its select-channel mode, the receiver only tunes to the channels the user stored in the list of select channels. The present invention limits the memory and processing power required to store an electronic TV program guide by only storing program guide information associated with the channels stored by the user in connection with the select-channels function of the receiver. In receivers having a second tuner, the second tuner may be used to automatically update the stored program guide.

Abstract: An inverse discrete cosine transform processor for transforming a video signal from frequency domain signals into spatial domain signals. A bus converter receives DCT coefficient data from parallel processing paths and converts the DCT coefficient data to even and odd processing paths. Partial IDCT processors convert, in parallel, the coefficient data from the even and off processing paths to produce intermediate coefficient values by performing a one dimensional transform. The intermediate coefficient values are transposed in a transpose RAM to produce transposed intermediate coefficient values which are subsequently separated into even and odd processing paths and converted in parallel to produce pixel values by performing a one dimensional transform.

Abstract: Apparatus and method for determining the lengths of a plurality of variable length encoded data values included in a data stream within a single clock cycle. The apparatus includes a shifter for receiving the data stream. The shifter is responsive to a shift control signal for transmitting a subset of the plurality of variable length encoded data values. A first length decoding mechanism is coupled to receive the subset of the plurality of encoded data values. The first length decoding mechanism performs a first decoding operation to determine the length of a first one of the encoded data values in the subset. A second length decoding mechanism is also coupled to receive the subset of the plurality of encoded data values. The second length decoding mechanism performs a second decoding operation to individually determine the length of a second one of the encoded data values in the subset. The second encoded data value immediately follows the first encoded data value in the subset.

Abstract: A transport decoder 110, for receiving and processing a transport data stream using MPEG-2 formats, includes connections to a physical layer channel interface (channel interface) 112, a buffer memory 114, a host microprocessor 116, audio and video decoders 118/120, and clock signal circuitry 122.

Abstract: A transport decoder 110, for receiving and processing a transport data stream using MPEG-2 formats, includes connections to a physical layer channel interface (channel interface) 112, a buffer memory 114, a host microprocessor 116, audio and video decoders 118/120, and clock signal circuitry 122. Upon receipt of a discontinuity indicator, the transport packet headers are parsed and transport packet payloads are stored in memory. Subsequently, upon receipt of a next program counter reference (PCR) value, a counter is loaded with the received program counter reference value. Next, the data stored in memory is searched for a time stamp and, when one is found, the time stamp is retrieved. Finally, a timer interrupt is set for a point in time approximately one frame time before the time stamp value, and, when the timer interrupt occurs, the program counter reference value is sent to the decoders, thereby providing sufficient time for the decoders to process data.

Abstract: A transport decoder 110, for receiving and processing a transport data stream using MPEG-2 formats, includes connections to a physical layer channel interface (channel interface) 112, a buffer memory 114, a host microprocessor 116, audio and video decoders 118/120, and clock signal circuitry 122. To properly interface to a bitrate-constrained audio decoder, the PES headers of received data are stripped and parsed (step 530), a frame time is determined (step 532), the timer begins running (step 534), audio processors 226/228 burst out a frame of data (step 536) and audio processors 226/228 pause (step 538). After the burst, the audio processor determines (step 540) if more audio frames are available in the current packet. If more frames are available, control transfers to (step 534) and the process continues as outlined above.

Abstract: An inverse discrete cosine transform processor for transforming a video signal from frequency domain signals into spatial domain signals. A bus converter receives DCT coefficient data from parallel processing paths and converts the DCT coefficient data to even and odd processing paths. Partial IDCT processors convert, in parallel, the coefficient data from the even and odd processing paths to produce intermediate coefficient values by performing a one dimensional transform. The intermediate coefficient values are transposed in a transpose RAM to produce transposed intermediate coefficient values which are subsequently separated into even and odd processing paths and converted in parallel to produce pixel values by performing a one dimensional transform. The 1-D IDCT processors each include input section circuits which each receive four-bits of 12-bit or 16-bit input values and provides one bit of each of four input values in a four clock cycle time period.

Abstract: A video compression system which is based on the image data compression system developed by the Motion Picture Experts Group (MPEG) uses various group-of-fields configurations to reduce the number of binary bits used to represent an image composed of odd and even fields of video information, where each pair of odd and even fields defines a frame. According to a first method, each field in the group of fields is predicted using the closest field which has previously been predicted as an anchor field. According to a second method, intra fields (I-fields) and predictive fields (P-fields) are distributed in the sequence so that no two I-fields and/or no two P-fields are at adjacent locations in the sequence.

Abstract: A video compression system which is based on the image data compression system developed by the Motion Picture Experts Group (MPEG) uses various group-of-fields configurations to reduce the number of binary bits used to represent an image composed of odd and even fields of video information, where each pair of odd and even fields defines a frame. .[.According to a first method, each field in the group of fields is predicted using the closest field which has previously been predicted as an anchor field. According to a second method, intra fields (I-fields) and predictive fields (P-fields) are distributed in the sequence so that no two I-fields and/or no two P-fields are at adjacent locations in the sequence. According to a third method, t.]. .Iadd.T.Iaddend.