Abstract: A method of measuring signal delay in a integrated circuit comprising applying a common clock signal at a circuit input and output, applying a test signal at the circuit input, detecting a corresponding output signal at the circuit output and detecting whether the test signal and output signal occur in a common part of the clock signal.
Type:
Grant
Filed:
December 10, 2008
Date of Patent:
October 8, 2013
Assignee:
Maxeler Technologies Limited
Inventors:
Peter Ying Kay Cheung, Nicholas Peter Sedcole, Justin Sung-Jit Wong