Abstract: The present disclosure relates to an implementation for a trusted computing system. According to the embodiments of the present disclosure, a master controller in an SSD, which is necessarily configured in the system, is used to provide all necessary security functionality of the system's RoT. The system does not need to contain any special RoT chip or module, does not need any modifications in the system design, is easy to adopt, and can be implemented by any system comprising a hard drive. All necessary security functions are completed by the master controller of the system's hard drive. Thus, not only can the cost of the security module be reduced, but more importantly, the mechanism directly protects information and resources (e.g., operating system, user programs, user data, etc.) that actually need to be protected in the system, and once the mechanism is enabled, the protection function cannot be bypassed.

Abstract: Disclosed are a solid state drive and a write operation method. The solid state drive comprises: a controller, receiving write data from outside and comprising a first cache unit for storing the write data; a Flash memory, receiving the write data sent by the first cache unit according to a first instruction of the controller; a second cache unit, storing the write data from the first cache unit as backup data, and sending the backup data to the Flash memory according to a second instruction of the controller. The second instruction is obtained after the write data fails to be written into the Flash memory under the first instruction, so that the backup data can continue to be called if write operation fails. By combining advantages of the first and second cache units, efficiency and quality of write operations are improved and bandwidth requirements are lowered.

Abstract: Disclosed is a self-deploying encrypted hard disk, a deployment method thereof, a system and a boot method thereof.

Abstract: Disclosed is a system and a method for information distribution. The system comprises: a server for generating a group key and its corresponding key deriving parameter, wherein the server encrypts sensitive contents by using the group key to obtain encrypted information; and terminals configured to receive the encrypted information through an open channel, extract the group key, then decrypt the encrypted information by using the group key to obtain the original content. In the group forming process, each terminal encrypts its private identifier using the public key and submits the ciphertext to the server. In information distribution process, the server transmits the ciphertext of sensitive contents and the key deriving parameter to the terminals via open channel Because private information available only to respective group members is required for calculating the group key, this mechanism ensures that the sensitive content can be transmitted securely on the open channel.

Abstract: Disclosed is a driver of an ethernet transmitter and a control method therefor. The driver has a first output port and a second output port connected to an ethernet receiver through a transmission line, and comprises: a signal conversion module for converting differential current signals into a first voltage signal and a second voltage signal; a first driving module adjusting a swing of the first voltage signal, to obtain a first output signal having a voltage equal to the first voltage signal; a second driving module adjusting a swing of the second voltage signal, to obtain a second output signal having a voltage equal to the second voltage signal. An architecture having a relatively small area is realized, and the ethernet transmitter meets the requirement on a large output swing in 10BASE-T mode.

Abstract: Disclosed is a frequency dividing circuit, a frequency dividing method and a phase locked loop. The frequency dividing circuit comprises: a clock selection unit outputting a first clock signal, select a second clock signal lagging behind the first clock signal by (½-1/M) of one phase; an integer frequency dividing unit performing frequency division on the first clock signal to provide a frequency-divided clock signal; a trigger unit triggering the frequency-divided clock signal according to the second clock signal to obtain a modulation clock signal; a switching signal unit providing a switching signal according to the modulation clock signal and a preset target output frequency. The clock selection unit selects and further outputs a third clock signal as the first clock signal according to the target phase selection information, to adjust the frequency of the frequency-divided clock signal, reduce noise and improve loop bandwidth of the phase locked loop.

Abstract: An optimal detection voltage obtaining method, a reading control method and an apparatus are provided.