Abstract: The present invention is a fiber channel switch employing a distributed queuing algorithm for interconnecting a plurality of devices (workstations, supercomputer, peripherals) through their associated node ports (N.sub.-- ports) and employs a fabric having a shared memory coupled to a plurality of fabric ports (F.sub.-- ports) through a bi-directional bus over which memory addresses, frame data and communications commands are transmitted. Each F.sub.-- port includes a port controller employing a distributed queuing algorithm associated with a control network for communicating commands between the ports related to when and where frame transfers should be made, wherein the bi-directional bus provides an independent data network for access to the shared memory such that frames can be transferred to and from the shared memory in response to port controller commands.
Abstract: A method and apparatus for delaying frames received asynchronously from a fiber channel port until receive memory is properly sequenced for storing the delayed frames in which a circular buffer is positioned on the data path between the fiber channel port and the receive memory for delaying the frames in accordance with control signals generated by a sequencer having knowledge of the receive memory sequence count.
Abstract: A method and apparatus for the synchronization of an F.sub.-- port receiver on a Fibre Channel switch with an external N.sub.-- port to ensure the reception of a stream of transmission characters including four byte ordered sets having a comma character positioned as the left most byte in the ordered set in accordance with the Fibre Channel standard.
Abstract: A system and method for inserting intermix frames into a continuous stream of class 1 frames. A bypass bus, in conjunction with a buffer, are provided within a fiber optic switch element, to route intermix data frame through the switch that is concurrently transmitting class 1 data. A channel module, which is disposed between a switch module and a plurality of fiber optic channels, comprises a port intelligence system and a memory interface system. The port intelligence system is responsible for transmitting and receiving data from the fiber optic channels in accordance with a predetermined protocol, preferably Fibre Channel. The memory interface system comprises a receive memory unit, a transmit memory unit and memory control logic. When an intermix frame is to be passed through the switch, the intermix frame is passed to the buffer concurrently while class 1 data transfer occurs via the bypass bus.
Type:
Grant
Filed:
January 29, 1997
Date of Patent:
October 27, 1998
Assignee:
McDATA Corporation
Inventors:
Dwayne R. Bennett, Clifford S. Yeung, Wayne Wu
Abstract: A method and apparatus for removing a virtual connection between first and second devices in a communication system that includes at least one switch virtually connecting the first and second devices. An error in the virtual connection can be detected in at least one of the first and second devices and the at least one switch, with the detector transmitting a request to remove the virtual connection. The virtual connection then is removed from the communication system in response to the transmission of the request. The request to remove the virtual circuit may be in the form of an information frame transmitted over the virtual connection, with each system component being removed from the virtual circuit upon its processing of the information frame. Additionally, a method and apparatus for operating the virtual connection between the first and second devices.