Abstract: A logic system between parallel channel end devices such as a computer and peripheral device. A level converter converts parallel digital signals from the external devices to levels for the system. A comparator samples the converted levels. Multiplex serialization of the parallel signals is initiated by comparator action and proceeds under count control. Sampled converted levels are also used to generate mode signals which are used to select predetermined logic patterns within the system, and to select varied lengths of count for messages serialized for transmission from one end of the logic system to the other. The serialized messages received at the other end are converted to parallel form by a shift register under count action governed by the mode of transmission. A sampling of the mode intelligence transmitted is used to set the receiving end in the same mode as the sending end. Buffer registers are provided for temporary storage of received messages.

Abstract: A logic system between parallel channel end devices such as a computer and peripheral device. A level converter converts parallel digital signals from the external devices to levels for the system. A comparator samples the converted levels. Multiplex serialization of the parallel signals is initiated by comparator action and proceeds under count control. Sampled converted levels are also used to generate mode signals which are used to select predetermined logic patterns within the system, and to select varied lengths of count for messages serialized for transmission from one end of the logic system to the other. The serialized messages received at the other end are converted to parallel form by a shift register under count action governed by the mode of transmission. A sampling of the mode intelligence transmitted is used to set the receiving end in the same mode as the sending end. Buffer registers are provided for temporary storage of received messages.