Abstract: A control device to be connected to a host and a disk device including at least one Redundant Arrays of Independent Disks (RAID) set, the control device includes circuitry that performs data communication with the host by a protocol capable of connecting one logical device in the RAID set to each port, virtually sets a plurality of ports which are defined by the protocol, sets a plurality of logical devices in the RAID set included in the disk device, and connects the plurality of logical devices to the plurality of ports, respectively, and the circuitry is to be connected to the host through an interface.

Abstract: A storage control device that includes processing circuitry that receives second access instructions of a plurality of series generated based on a first access instruction for instructing writing of data in a first storage or reading of data from the first storage, through a plurality of channels, the storage control device being connected to a controller configured to perform writing of data in the first storage or reading of data from the first storage according to an instruction for accessing the first storage, reassembles the first access instruction based on the second access instructions of the plurality of series received by the processing circuitry, and outputs the first access instruction reassembled by the processing circuitry to the controller.

Abstract: A storage controlling system, coupled to a storage apparatus including storage disk devices, receives writing target data, generates a parity in units of parity generation of a given length for the data, and stores the data and parity into the devices. The system includes a cache memory and controller. The controller includes: a reception section receiving a writing instruction including the writing target data and information for specifying a target sector to write the data to; a decision section deciding whether processing target data is held in the cache memory, the processing target data including at least one unit of parity generation that includes sector data stored in the sector and fraction data other than the sector data; and a writing processing section updating, when the processing target data is in the cache memory, the data based on the instruction and outputting the post-update data as the writing target data to the apparatus.

Abstract: A control device to be connected to a host and a disk device including at least one Redundant Arrays of Independent Disks (RAID) set, the control device includes circuitry that performs data communication with the host by a protocol capable of connecting one logical device in the RAID set to each port, virtually sets a plurality of ports which are defined by the protocol, sets a plurality of logical devices in the RAID set included in the disk device, and connects the plurality of logical devices to the plurality of ports, respectively, and the circuitry is to be connected to the host through an interface.

Abstract: A storage control device that includes processing circuitry that receives second access instructions of a plurality of series generated based on a first access instruction for instructing writing of data in a first storage or reading of data from the first storage, through a plurality of channels, the storage control device being connected to a controller configured to perform writing of data in the first storage or reading of data from the first storage according to an instruction for accessing the first storage, reassembles the first access instruction based on the second access instructions of the plurality of series received by the processing circuitry, and outputs the first access instruction reassembled by the processing circuitry to the controller.

Abstract: A storage control device is connected to a disk device that retains write commands including area specifying information specifying areas as write targets and including write object data as write objects and performs writing onto a disk based on the retained write commands. The storage control device includes a controller cache memory in which data read from the disk device is cached, and controller circuitry that generates a write command for writing write object data of a write command received at a second point of time later than a first point of time and gap data between an area specified by area specifying information included in the write command received at the second point of time and an area specified by area specifying information included in the write command received at the first point of time, and outputs the generated write command to the disk device.

Abstract: A storage controlling system, coupled to a storage apparatus including storage disk devices, receives writing target data, generates a parity in units of parity generation of a given length for the data, and stores the data and parity into the devices. The system includes a cache memory and controller. The controller includes: a reception section receiving a writing instruction including the writing target data and information for specifying a target sector to write the data to; a decision section deciding whether processing target data is held in the cache memory, the processing target data including at least one unit of parity generation that includes sector data stored in the sector and fraction data other than the sector data; and a writing processing section updating, when the processing target data is in the cache memory, the data based on the instruction and outputting the post-update data as the writing target data to the apparatus.

Abstract: An information processing device that presents at least one of data stored in memory or indexes corresponding to the data; receives a selection of the presented at least one of the data or the indexes corresponding to the data; obtains information related to the selected at least one of the data or the indexes corresponding to the data; generates at least one search key abstracted from the obtained information; searches for data within the memory based on the at least one search key; and presents at least one of the data or indexes corresponding to the data as a search result.

Abstract: An information processing device that presents at least one of data stored in memory or indexes corresponding to the data; receives a selection of the presented at least one of the data or the indexes corresponding to the data; obtains information related to the selected at least one of the data or the indexes corresponding to the data; generates at least one search key abstracted from the obtained information; searches for data within the memory based on the at least one search key; and presents at least one of the data or indexes corresponding to the data as a search result.

Abstract: An information processing device that presents at least one of data stored in memory or indexes corresponding to the data; receives a selection of the presented at least one of the data or the indexes corresponding to the data; obtains information related to the selected at least one of the data or the indexes corresponding to the data; generates at least one search key abstracted from the obtained information; searches for data within the memory based on the at least one search key; and presents at least one of the data or indexes corresponding to the data as a search result.

Abstract: To protect a password from leakage, it is necessary to change it frequently, which is troublesome and difficult to be done realistically. According to the present invention, an encrypted access code is stored in a transportable and nonvolatile memory on the part of a computer to be remotely accessed. When a user actually carries the nonvolatile memory to plug it into a computer remotely accessing, remote access is established between the computer to be remotely accessed and the computer remotely accessing.

Abstract: It is aimed at not only enabling access to an inaccessible SDRAM area from a PC which only outputs A0 through A11 signals, but also making a common memory module connectable to earlier or latest PCs independently of their models. According to the construction, a connected PC (computer) inputs a high-order address signal A12. It is determined whether or not the input A12 signal is set to a state different from an unused state. A determination signal is generated so as to indicate a state corresponding to a determination result. When the determination signal indicates a changed state, the PC inputs A0 through A12 signals and supplies them to a memory chip 20. When the determination signal indicates an unchanged state, the PC inputs A0 through A11 signals and a select signal. The A12 signal is generated based on the input select signal. The memory chip 20 is supplied with the A12 signal and the input A0 through A11 signals.