Patents Assigned to MEMC Electronic Materials, SpA
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Patent number: 9359691Abstract: A method of loading a crucible includes loading a first layer of polysilicon chunks into the crucible and loading a second layer of granular polysilicon into the crucible to form a polysilicon charge such that the packing density of the polysilicon charge within the crucible is greater than 0.70.Type: GrantFiled: November 26, 2012Date of Patent: June 7, 2016Assignee: MEMC Electronic Materials SpAInventors: Umberto Martini, Luigi Bonanno, Paolo Collareta, Maria Porrini
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Patent number: 8691055Abstract: The present disclosure relates to processes and systems for purifying technical grade trichlorosilane and/or technical grade silicon tetrachloride into electronic grade trichlorosilane and/or electronic grade silicon tetrachloride.Type: GrantFiled: September 7, 2012Date of Patent: April 8, 2014Assignee: MEMC Electronic Materials SpAInventor: Gianfranco Ghetti
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Publication number: 20130327506Abstract: Shell and tube heat exchangers that include a baffle arrangement that improves the temperature profile and flow pattern throughout the exchanger and/or that are integral with a reaction vessel are disclosed. Methods for using the exchangers including methods that involve use of the exchanger and a reaction vessel to produce a reaction product gas containing trichlorosilane are also disclosed.Type: ApplicationFiled: August 9, 2013Publication date: December 12, 2013Applicant: MEMC Electronic Materials SpAInventors: Gianluca Pazzaglia, Matteo Fumagali, Rodolfo Bovo
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Publication number: 20130206163Abstract: A system for ultrasonically cleaning one or more wires of a wire saw for slicing semiconductor or solar material into wafers. The system includes an ultrasonic transducer connected to a sonotrode. The system also includes a sonotrode plate adjacent to one or more of the wires. The sonotrode plate has an opening that exposes the sonotrode to one or more of the wires. The system further includes a tank for delivering a flow of liquid to contact the sonotrode and one or more of the wires. The tank is positioned on the same side of the wires as the sonotrode plate. The ultrasonic transducer is configured to vibrate and form cavitations in the liquid for the removal of contaminants from a surface of one or more of the wires.Type: ApplicationFiled: August 14, 2012Publication date: August 15, 2013Applicant: MEMC Electronic Materials, SPAInventors: Carlo Zavattari, Ferdinando Severico, Roland R. Vandamme, Fabrizio Bonda
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Publication number: 20130139800Abstract: Methods are disclosed for controlling surface profiles of wafers cut in a wire saw machine. The systems and methods described herein are generally operable to alter the nanotopology of wafers sliced from an ingot by controlling the shape of the wafers. The shape of the wafers is altered by changing the temperature and/or flow rate of a temperature-controlling fluid circulated in fluid communication with bearings supporting wire guides of the saw. Different feedback systems can be used to determine the temperature of the fluid necessary to generate wafers having the desired shape and/or nanotopology.Type: ApplicationFiled: December 2, 2011Publication date: June 6, 2013Applicant: MEMC Electronic Materials, SPAInventors: Carlo Zavattari, Ferdinando Severico, Sumeet S. Bhagavat, Gabriele Vercelloni, Roland R. Vandamme
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Publication number: 20120322175Abstract: Systems and methods are provided for controlling silicon rod temperature. In one example, a method of controlling a surface temperature of at least one silicon rod in a chemical vapor deposition (CVD) reactor during a CVD process is presented. The method includes determining an electrical resistance of the at least one silicon rod, comparing the resistance to a set point to determine a difference, and controlling a power supply to control a power output coupled to the at least one silicon rod to minimize an absolute value of the difference.Type: ApplicationFiled: June 11, 2012Publication date: December 20, 2012Applicant: MEMC Electronic Materials SpAInventors: Gianluca Pazzaglia, Matteo Fumagalli, Manuel Poniz
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Patent number: 7223344Abstract: A method of separating, recovering and reusing components of an exhausted slurry used in slicing silicon wafers from a silicon ingot. In the method, the solid particles and lubricating fluid of the exhausted slurry are separated without decreasing the viscosity of the exhausted slurry. The separated lubricating fluid may be collected and reused in the preparation of a fresh slurry. Additionally, the silicon particulate and metal slicing wire particulate are dissolved and separated from the abrasive grains. The abrasive grains are separated into spent abrasive grains and unspent abrasive grains. The separated unspent abrasive grains are suitable for reuse in the preparation of a fresh slurry.Type: GrantFiled: May 29, 2001Date of Patent: May 29, 2007Assignee: MEMC Electronic Materials, SpAInventors: Carlo Zavattari, Guido Fragiacomo, Elio Portaluppi
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Patent number: 7137874Abstract: A wafer polishing apparatus for polishing a semiconductor wafer. The polisher comprises a base (23), a turntable (27), a polishing pad (29) and a drive mechanism (45) for driven rotation of a polishing head (63). The polishing head is adapted to hold at least one wafer (35) for engaging a front surface of the wafer with a work surface of the polishing pad. A spherical bearing assembly (75) mounts the polishing head (63) on the drive mechanism for pivoting of the polishing head about a gimbal point (p) lying no higher than the work surface when the polishing head holds the wafer in engagement with the polishing pad. This pivoting allowing the plane of the front surface of the wafer to continuously align itself to equalize polishing pressure over the front surface of the wafer, while rotation of the polishing head is driven by the driving mechanism.Type: GrantFiled: November 21, 2000Date of Patent: November 21, 2006Assignee: MEMC Electronic Materials, SpAInventors: Ezio Bovio, Paride Corbellini, Marco Morganti, Giovanni Negri, Peter D. Albrecht
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Patent number: 6878302Abstract: The method comprises the steps of mounting a first wafer (13) on the mounting member (12) and securing the mounting member to the hub (16) by drawing a vacuum at a first vacuum pressure through the hub; rotating the hub about the hub axis (AH), rotating a polishing pad (34) mounted on the turntable (30) about the turntable axis (at), and bringing a surface of the wafer (13) and the polishing pad into contact with each other. The wafer (16) is demounted, and the shape of the polished wafer is determined. A second vacuum pressure is selected using the information obtained. A successive wafer is polished according to the same method as the first wafer except that the second vacuum pressure is substituted for the first vacuum pressure. The second vacuum pressure is sufficient to deform the mounting member (12) thereby deform the wafer to improve the flatness and parallelism of the surfaces of the successive wafer.Type: GrantFiled: March 30, 2000Date of Patent: April 12, 2005Assignee: MEMC Electronic Materials, SpAInventors: Paride Corbellini, Giovanni Negri, Ezio Bovio, Luca Moiraghi
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Patent number: 6803576Abstract: The present invention is a method for quantitatively measuring nitrogen in Czochralski silicon based on the detection of one or more N—O complexes by means of low temperature Fourier Transform infrared spectroscopy (LT-FTIR) in the far infrared spectral range (FIR).Type: GrantFiled: September 23, 2002Date of Patent: October 12, 2004Assignee: MEMC Electronic Materials, SPAInventors: Maria Giovanna Pretto, Maria Porrini, Roberto Scala, Vladimir Voronkov, Paolo Collareta, Robert J. Falster
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Patent number: 6537368Abstract: A process for preparing a silicon epitaxial wafer. The wafer has a front surface having an epitaxial layer deposited thereon, a back surface, and a bulk region between the front and back surfaces, wherein the bulk region contains a concentration of oxygen precipitates. In the process, the wafer is first subjected to an ideal oxygen precipitating heat treatment to causes the formation of a non-uniform distribution of crystal lattice vacancies with the concentration of vacancies in the bulk region being greater than the distribution of vacancies in the front surface. The ideal precipitating wafer is then subjected to an oxygen precipitation heat treatment to cause the nucleation and growth of oxygen precipitates to a size sufficient to stabilize the oxygen precipitates, with the oxygen precipitates being formed primarily according to the vacancy profile. An epitaxial layer is then deposited on the surface of the oxygen precipitate stabilized wafer.Type: GrantFiled: August 13, 2001Date of Patent: March 25, 2003Assignee: MEMC Electronic Materials SpAInventors: Robert J. Falster, Marco Cornara, Daniela Gambaro, Massimiliano Olmo
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Patent number: 6306733Abstract: A process for preparing an silicon epitaxial wafer. The wafer has a front surface having an epitaxial layer deposited thereon, a back surface, and a bulk region between the front and back surfaces, wherein the bulk region contains a concentration of oxygen precipitates. In the process, a wafer having interstitial oxygen atoms is first subjected to an oxygen precipitation heat treatment to cause the nucleation and growth of oxygen precipitates to a size sufficient to stabilize the oxygen precipitates. An epitaxial layer is then deposited on the surface of the oxygen precipitate stabilized wafer.Type: GrantFiled: July 27, 2000Date of Patent: October 23, 2001Assignee: MEMC Electronic Materials, SPAInventors: Robert Falster, Marco Cornara, Daniela Gambaro, Massimiliano Olmo
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Patent number: 6204152Abstract: A process for heat-treating a single crystal silicon wafer to influence the precipitation behavior of oxygen in the wafer in a subsequent thermal processing step. The wafer has a front surface, a back surface, a central plane between the front and back surfaces, and a sink for crystal lattice vacancies at the front surface. In the process, the wafer is subjected to a heat-treatment to form crystal lattice vacancies, the vacancies being formed in the bulk of the silicon. The wafer is then cooled from the temperature of said heat treatment at a rate which allows some, but not all, of the crystal lattice vacancies to diffuse to the crystal lattice vacancy sink to produce a wafer having a vacancy concentration profile in which the peak density is at or near the central plane with the concentration generally decreasing in the direction of the front surface of the wafer.Type: GrantFiled: June 30, 1999Date of Patent: March 20, 2001Assignee: MEMC Electronic Materials, SpAInventors: Robert Falster, Marco Cornara, Daniela Gambaro, Massimiliano Olmo
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Patent number: 5994761Abstract: A process for heat-treating a single crystal silicon wafer to influence the precipitation behavior of oxygen in the wafer in a subsequent thermal processing step. The wafer has a front surface, a back surface, a central plane between the front and back surfaces, and a sink for crystal lattice vacancies at the front surface. In the process, the wafer is subjected to a heat-treatment to form crystal lattice vacancies, the vacancies being formed in the bulk of the silicon. The wafer is then cooled from the temperature of said heat treatment at a rate which allows some, but not all, of the crystal lattice vacancies to diffuse to the crystal lattice vacancy sink to produce a wafer having a vacancy concentration profile in which the peak density is at or near the central plane with the concentration generally decreasing in the direction of the front surface of the wafer.Type: GrantFiled: February 26, 1997Date of Patent: November 30, 1999Assignee: MEMC Electronic Materials SpAInventors: Robert Falster, Marco Cornara, Daniela Gambaro, Massimiliano Olmo
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Patent number: 5403406Abstract: A silicon wafer containing oxygen precipitate nucleation centers (or oxygen precipitates) and having a first face, a second face, and a central plane equidistant between the first and second faces. The nucleation centers (or oxygen precipitates) have a non-uniform distribution between the first and second faces with a maximum density of the nucleation centers (or oxygen precipitates) being in a region which is between the first face and the central plane and nearer to the first face than the central plane. The density of the nucleation centers (or oxygen precipitates) increases from the first face to the region of maximum density and decreasing from the region of maximum density to the central plane.Type: GrantFiled: May 13, 1993Date of Patent: April 4, 1995Assignee: MEMC Electronic Materials, SpAInventors: Robert Falster, Giancarlo Ferrero, Graham Fisher, Massimiliano Olmo, Marco Pagani
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Patent number: 5401669Abstract: A process for treatment of a silicon wafer to achieve therein a controlled distribution of the density of oxygen precipitate nucleation centers. In the process, one face of the wafer is shielded and the other, unshielded, face of the wafer is exposed to an atmosphere which contains nitrogen or a nitrogen compound gas and which has an essential absence of oxygen during a rapid thermal treatment at a temperature of at least about 1175.degree. C. The process generates nucleation centers which serve as sites for the growth of oxygen precipitates during a subsequent heat treatment and which have a peak density proximate the unshielded face of the wafer.Type: GrantFiled: May 17, 1993Date of Patent: March 28, 1995Assignee: MEMC Electronic Materials, SpAInventors: Robert Falster, Giancarlo Ferrero, Graham Fisher, Massimiliano Olmo, Marco Pagani
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Patent number: 5272119Abstract: A process for increasing the minority carrier recombination lifetime in a silicon body contaminated with transition metals, expecially iron. The silicon body is stored at a temperature and for a period sufficient to cause metal to diffuse from the bulk of the silicon body to the surface of the silicon body to measurably increase the minority carrier recombination lifetime.Type: GrantFiled: November 3, 1992Date of Patent: December 21, 1993Assignee: MEMC Electronic Materials, SpAInventor: Robert Falster