Patents Assigned to Memory Integrity, LLC
  • Publication number: 20150074325
    Abstract: A multi-processor computer system is described in which transaction processing is distributed among multiple protocol engines. The system includes a plurality of local nodes and an interconnection controller interconnected by a local point-to-point architecture. The interconnection controller comprises a plurality of protocol engines for processing transactions. Transactions are distributed among the protocol engines using destination information associated with the transactions.
    Type: Application
    Filed: November 3, 2014
    Publication date: March 12, 2015
    Applicant: MEMORY INTEGRITY, LLC
    Inventors: Charles Edward Watson, JR., Rajesh Kota, David Brian Glasco
  • Publication number: 20140328212
    Abstract: Network topology codes are computed and used as keys to retrieve topology-specific information for isomorphic networks.
    Type: Application
    Filed: July 15, 2014
    Publication date: November 6, 2014
    Applicant: Memory Integrity, LLC
    Inventor: James Wesley Bemont
  • Patent number: 8811232
    Abstract: Network topology codes are computed and used as keys to retrieve topology-specific information for isomorphic networks.
    Type: Grant
    Filed: March 1, 2013
    Date of Patent: August 19, 2014
    Assignee: Memory Integrity, LLC
    Inventor: James Wesley Bemont
  • Publication number: 20140013079
    Abstract: A multi-processor computer system is described in which transaction processing is distributed among multiple protocol engines. The system includes a plurality of local nodes and an interconnection controller interconnected by a local point-to-point architecture. The interconnection controller comprises a plurality of protocol engines for processing transactions. Transactions are distributed among the protocol engines using destination information associated with the transactions.
    Type: Application
    Filed: September 9, 2013
    Publication date: January 9, 2014
    Applicant: Memory Integrity, LLC
    Inventors: Charles Edward Watson, JR., Rajesh Kota, David Brian Glasco
  • Patent number: 8572206
    Abstract: A multi-processor computer system is described in which transaction processing in each cluster of processors is distributed among multiple protocol engines. Each cluster includes a plurality of local nodes and an interconnection controller interconnected by a local point-to-point architecture. The interconnection controller in each cluster comprises a plurality of protocol engines for processing transactions. Transactions are distributed among the protocol engines using destination information associated with the transactions.
    Type: Grant
    Filed: December 15, 2011
    Date of Patent: October 29, 2013
    Assignee: Memory Integrity, LLC
    Inventors: Charles Edward Watson, Jr., Rajesh Kota, David Brian Glasco