Abstract: Embodiments provide crossbar structures, and reconfigurable circuits that contain crossbar structures, that include n inputs and an output, where n is an integer, chains of transistors coupled to the n inputs and the output, a plurality of control signal elements—each coupled to one or more transistors of the plurality of chains of transistors to selectively couple said n inputs to the output—and an additional chain of transistors coupled to at least some of the plurality of control signal elements and the output to selectively couple a constant output voltage to the output. Other embodiments may be disclosed and claimed.

Abstract: Embodiments of the present disclosure provide methods and integrate circuits with dynamic phase alignment between an input data signal and a clock signal. In some embodiments, a sampling window of the input data signal may be determined and timing of the input data signal may be adjusted to enable the input data signal to be sampled within the sampling window. Other embodiments may be disclosed and claimed.

Abstract: Memory employing a plurality of five-transistor memory bit cells in a memory matrix and a power supply control circuit that is configured to provide a simultaneous full clear to all of the memory bit cells is described herein.

Abstract: Embodiments provide input/output devices having programmable logic that is programmable to operate input/output devices in one of two drive modes. In various embodiments, to operate an input/output device in a first drive mode, logic circuitry is programmable to couple a reference voltage to a gate of a transistor element of an output driver. In various embodiments, to operate an input/output device in a second drive mode, the logic circuitry is programmable to couple a bias voltage to the gate of the transistor element of the output driver. In various embodiments, the logic circuitry may also be programmable to couple one of a plurality of data inputs to the output driver to operate an input/output device in either a single-ended mode or a differential mode.

Abstract: Reconfigurable circuits, methods, and systems with reconfigurable interconnect devices, clusters of reconfigurable logic devices, and a programming interface configured to receive configuration data to configure a first combination of the reconfigurable interconnect and logic devices to implement a circuit, and to remap a portion of the received configuration data, corresponding to a defective cluster, from the defective cluster to another non-defective cluster of the plurality of clusters to configure a second combination of the reconfigurable interconnect and logic devices to implement the circuit.

Abstract: Embodiments of crossbar devices constructed with Micro-Electro-Mechanical Systems (MEMS) switches are disclosed herein. A crossbar device may comprise m input terminals, n output terminals, n control lines and m×n MEMS switches coupled to the n control lines to selectively couple the m input terminals to the n output terminal. Each of the MEMS switches may comprise a contact node coupled to one of the m input terminals, a cantilever coupled to one of the n output terminals, a control node coupled to one of the n control lines to electrostatically control the cantilever to contact the contact node or be away from the contact node using electrostatic attractive or repulsive force respectively. The cantilever and the contact node are configured to remain in contact by molecular adhesion force, after the cantilever has been electrostatically controlled to contact the contact node, and the electrostatic attractive force has been removed. Other embodiments may be described and claimed.