Patents Assigned to Methode of California
  • Low voltage/high voltage field effect transistor (FET) switching circuit for printed circuit board tester
    Patent number: 4704551
    Abstract: A high voltage switching circuit for a printed circuit board tester, or the like, utilizing field effect transistor (FET) switches which are controlled by CMOS logic circuitry, which incorporates a voltage level shifter circuit for high voltage switching operations, and which performs its switching functions with a minimum of FET's and associated elements, as compared with similar switching circuits in the prior art.
    Type: Grant
    Filed: June 27, 1986
    Date of Patent: November 3, 1987
    Assignee: Methode of California
    Inventor: James K. Berger