Abstract: A transistor comprises a substrate of a first conductivity type, a drain region and a source region of a second conductivity type, a gate, a gate oxide layer, an adjustment implant region of the first conductivity type and a planar junction. The drain region and the source region are disposed in the substrate. The gate is placed over the substrate between the source region and the drain region. The gate is separated from the substrate by the gate oxide layer. The adjustment implant region is disposed under the gate oxide layer and in the substrate. A second doping concentration of the adjustment implant region is higher than a first doping concentration of the substrate. The adjustment implant region and the drain region in a predetermined shape form the planar junction with a surface curvature pointing towards the drain region to relax electrical field intensity at a location of the planar junction.

Abstract: A computer system includes a system CPU responsive to a control signal to load a first operating system or a second operating system. The first operating system is run by the computer system in a first operation mode and the second operating system is run by the computer system in a second entertainment mode. A PC operating in an entertainment mode may operate a variety of entertainment software applications. A quick boot process is also provided. The quick boot process may include an accelerated BIOS boot process that defers and delays appropriate tasks. The quick boot process may also include: detecting a condition; performing a BIOS boot process; loading an image file associated with the condition; and executing the image file associated with the condition. The condition may be that associated hardware is unchanged from a previous boot. A parental control system is also disclosed.

Abstract: The present invention provides a protection means for a driving circuit which drives a set of external electrode fluorescent lamps (EEFL). The driving circuit with protection function for driving a set of EEFLs consistent with the present invention includes: a transformer connected to the set of EEFLs; a switching network connected to the transformer which delivers power to the transformer; a sensing circuit connected to the set of EEFLs which detects disconnection if one light source is disconnected; and a controller connected to the switching network which controls the switching network to reduce the total current supplied to the EEFLs which remain connected, if the sensing circuit detects that one EEFL is disconnected. Appropriate protection can therefore be implemented when the EEFL is disconnected on one end or both ends.

Abstract: A DC/AC cold cathode fluorescent lamp (CCFL) inverter circuit includes a transformer with a primary winding and a secondary winding for providing increased voltage to a CCFL, a first and second MOSFET switches for selectively allowing direct current of a first polarity and a second polarity to flow through the transformer respectively. The primary and secondary windings of the transformer are electrically coupled to ground. A capacitor divider is electrically coupled to the CCFL for providing a first voltage signal representing a voltage across the CCFL. A first feedback signal line receives the first voltage signal. A timer circuit is coupled to the first feedback signal line for providing a time-out sequence of a predetermined duration when the first voltage signal exceeds a predetermined threshold. A protection circuit shuts down the first switch and the second switch when the first voltage signal exceeds the predetermined threshold after the predetermined duration.

Abstract: An amplifier that receives an input signal and outputs an amplified output signal includes an integration stage, a comparison stage, and a full bridge circuit. The integration stage is be used for receiving a constant common mode voltage, for receiving a first signal representing the input signal of the amplifier, and for generating a ramp signal. The comparison stage coupled to the integration stage is used for generating a pulse width modulation signal according to the ramp signal and according to a hysteretic signal. The full bridge circuit coupled to the comparison stage is used for receiving a power supply and the pulse width modulation signal, and for generating the output of the amplifier.

Abstract: A power supply topology according to one embodiment includes a first path coupled to a controllable DC power source, a second path coupled to a rechargeable battery, and a third path coupled to a system load, the three paths coupled to a common node. The topology may further include a unidirectional switch coupled to the first path and a selectively unidirectional switch coupled to the second path. The topology may further include a power management control circuit including a wake up circuit having a comparison circuit and an output decision circuit. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.

Abstract: A smart card enabled secure computing environment system locks the host computer system from user access and waits for a smart card to be inserted into an attached or co-resident smart card reader. When a smart card is inserted into the smart card reader, the invention asks the user to enter his smart card password which is compared to the password on the smart card. If the two passwords match, the invention looks up the user's username in an access file of valid users and finds its associated access times and/or cumulative time limits in the access file. if the current time is within any of the valid access times and the user's cumulative usage time is within the specified cumulative time limit, then access is granted and the system is unlocked. The invention periodically checks the current time while the user is using the computer. If a blocked time period is entered or a cumulative time limit is exceeded, the user is logged off the machine and the computer is locked from user access.

Abstract: A network interface system with packet filtering function is disclosed herein. The network interface system includes interfaces, a packet buffer and a controller. The packet buffer stores data packets received by the network interface system. The controller provides security defense for the host system and the network by filtering the data packets stored in the packet buffer. The controller controls the packet buffer abandoning a data packet if the data packet is identified as an unsafe packet. The controller also includes a regulator for controlling a transferring order of the data packets. Thus, the network interface system can drop unsafe data packet and transfer data packets considered as safe information. The data packets can be processed in a sequence according to preset priority rules.

Abstract: A method includes coupling a variable output DC power source to power control circuitry, and detecting a type of the variable output DC power source in response to the coupling operation. In one embodiment, the detecting operation may include sending an interrogation signal from the power control circuitry to the variable output DC power source, and evaluating a response to the interrogation signal to determine the type of said variable output DC power source. Power control circuitry may include source type recognition circuitry configured to detect a type of a variable output DC power source in response to a coupling of the variable output DC power source to the power control circuitry.

Abstract: A sequential burst mode regulation system to deliver power to a plurality of loads. In the exemplary embodiments, the system of the present invention generates a plurality of phased pulse width modulated signals from a single pulse width modulated signal, where each of the phased signals regulates power to a respective load. Exemplary circuitry includes a PWM signal generator, and a phase delay array that receives a PWM signal and generates a plurality of phased PWM signals which are used to regulate power to respective loads. A frequency selector circuit can be provided that sets the frequency of the PWM signal using a fixed or variable frequency reference signal.

Abstract: A method according to one embodiment may include supplying power to an LED array having at least a first string of LEDs and a second string of LEDs coupled in parallel, each of the strings includes at least two LEDs. The method of this embodiment may also include comparing a first feedback signal from the first string of LEDs and a second feedback signal from the second string of LEDs. The first feedback signal is proportional to current in said first string of LEDs and said second feedback signal is proportional to current in said second string of LEDs. The method of this embodiment may also include controlling a voltage drop of at least the first string of LEDs to adjust the current of the first string of LEDs relative to the second string of LEDs, based on, at least in part, the comparing of the first and second feedback signals. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.

Abstract: An apparatus includes battery gauge circuitry implemented on an integrated circuit. The battery gauge circuitry includes a plurality of switches that individually open in response to a voltage reduction on a battery cell associated with a respective one of the switches. The battery gauge circuitry also includes a logic device that determines if at least one of the switches is open. The battery gauge circuitry also includes a register that stores data that indicates if at least one switch is open. The battery gauge circuitry also includes a controller that initiates halting power delivery to a load if at least one of the switches is open. The controller also identifies the open switch.

Abstract: A system and method for cell balancing with smart low-voltage control circuit. The cell balancing system comprises a plurality of battery cells, an external bypass path for each cell, an internal bypass path for each cell, an input terminal receiving an enable signal for each cell, an input terminal receiving a selection signal, and a cell balancing unit for generating a configuration signal to conduct the external bypass path or internal bypass path. The enable signal is configured to enable a bypass current of each cell, and the selection signal is configured to select the external bypass path or internal bypass path. The cell balancing unit is employed to receive signals from input terminals, and generate a configuration signal to control the conductance of external bypass paths or internal bypass paths.

Abstract: A computer system includes a system CPU responsive to a control signal to load a first operating system or a second operating system. The first operating system is run by the computer system in a first operation mode and the second operating system is run by the computer system in a second entertainment mode. A PC operating in an entertainment mode may operate a variety of entertainment software applications. A quick boot process is also provided. The quick boot process may include an accelerated BIOS boot process that defers and delays appropriate tasks. The quick boot process may also include: detecting a condition; performing a BIOS boot process; loading an image file associated with the condition; and executing the image file associated with the condition. The condition may be that associated hardware is unchanged from a previous boot. A parental control system is also disclosed.

Abstract: Circuits and methods for controlling a converter are disclosed. A first switch within the converter can be turned off, and a second switch within the converter alternately can be turned on and off in response to a switch control signal while the first switch is turned off. By turning the second switch alternately on and off, energy stored in the converter can be recovered to a power source of the converter.

Abstract: A DC/AC converter circuit structure for driving a plurality of cold cathode fluorescent lamps is described. A common-mode choke is used between the cold cathode fluorescent lamps. The common-mode choke balances the currents respectively flowing through the cold cathode fluorescent lamps.

Abstract: A method according to one embodiment includes coupling at least one power supply to a power bus comprised in a digital camera. The method of this embodiment may also include allocating power to at least one component of the digital camera by coupling at least one component to the power bus based on at least one power management priority rule. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.

Abstract: A selector circuit configured to select among a DC power source and a plurality of batteries for an electronic device. The selector circuit includes a first comparator configured to compare a first input signal representative of a voltage level of the DC power source with a first threshold level and provide a first output signal representative of a difference between the first input signal and the first threshold level, and a selector output circuit. The selector output circuit is configured to provide selector output signals that control selection among the DC power source and the plurality of batteries. The selector output circuit providing said selector output signals to select the DC source and deselect the plurality of batteries if the first output signal is representative of the voltage level of said DC power source being greater than the first threshold level.

Abstract: An analog to digital converter (ADC) converts an analog signal to a digital signal. The ADC includes an input channel, a sampling circuit coupled to the input channel, an integrator coupled to the sampling circuit, and a feedback circuit coupled to the integrator. The input channel receives the analog signal. The sampling circuit samples the analog signal. The integrator receives the sampled analog signal and a feedback signal and integrates a superposition of the sampled analog signal and the feedback signal. The feedback circuit generates the digital signal according to an output of the integrator and sends the feedback signal indicative of the digital signal to the integrator.

Abstract: A method and system for tracking a portable device. A tracking system includes a portable device, a first Radio Frequency (RF) module, and a second RF module. The first Radio Frequency (RF) module is installed in the portable device for transmitting a wireless signal. The second RF module is used for receiving the wireless signal. When a received amplitude of the wireless signal that is received by the second RF module is less than a predetermined value, the second RF module generates an alert.