Abstract: An NVRAM fail-over controller including a NVRAM device connected to a host computer, the host computer having the ability to directly control the NVRAM device. The NVRAM fail-over controller includes an embedded processor that is powered by back-up power. The NVRAM fail-over controller includes a network interface that is powered by back-up power.
Type:
Grant
Filed:
April 14, 2004
Date of Patent:
November 6, 2007
Assignee:
Micro Memory LLC
Inventors:
Mike Jadon, Robert Lercari, Richard M. Mathews, William R. Peebles, Phap Nguyen, Mark Kampe