Patents Assigned to Micro Systems Technologies
  • Patent number: 7297610
    Abstract: First, a device wafer having a substrate layer and a device layer is provided. Then, a first mask pattern is utilized to remove the device layer uncovered by the first mask pattern. Subsequently, a medium layer is formed on the surface of the device wafer, and the medium layer is then bonded to a carrier wafer. Thereafter, a second mask pattern is utilized to remove the substrate layer uncovered by the second mask pattern. Finally, the medium layer is separated from the carrier wafer, the substrate layer is bonded to an extendable film, and the medium layer is then removed.
    Type: Grant
    Filed: July 18, 2005
    Date of Patent: November 20, 2007
    Assignee: Touch Micro-System Technology Inc.
    Inventor: Chen-Hsiung Yang
  • Patent number: 7262078
    Abstract: A substrate is provided. The substrate includes a plurality of devices disposed in the substrate, a plurality of contact pads disposed on a surface of the substrate and electrically connected to the devices, and a surface dielectric layer positioned on the surface of the substrate. Thereafter, a surface treatment process including at least a plasma etching process is performed. Subsequently, at least a plasma enhanced chemical vapor deposition (PECVD) process is performed to form a dielectric layer on a surface dielectric layer. The PECVD process is performed in a high frequency/low frequency alternating manner. Following that, a masking pattern on the dielectric layer is formed, and an anisotropic etching process is carried out to form a plurality of openings corresponding to the contact pads in the dielectric layer. The openings expose the contact pads, and each opening has an outwardly-inclined sidewall.
    Type: Grant
    Filed: March 15, 2005
    Date of Patent: August 28, 2007
    Assignee: Touch Micro-System Technology Inc.
    Inventors: Wei-Shun Lai, Shu-Hua Hu, Kuan-Jui Huang, Chin-Chang Pan, Yuan-Chin Hsu
  • Patent number: 7258806
    Abstract: A method of fabricating a diaphragm of a capacitive microphone device. First, a substrate is provided, and a dielectric layer on a first surface of the substrate is formed. Than, a plurality of silicon spacers are formed on a surface of the dielectric layer, and a diaphragm layer is formed on a surface of the silicon spacers and the surface of the dielectric layer. Subsequently, a planarization layer is formed on the diaphragm layer, and a second surface of the substrate is etched to form a plurality of openings corresponding to the diaphragm layer disposed on the surface of the dielectric layer. Thereafter, the dielectric layer exposed through the openings is removed, and planarization layer is removed.
    Type: Grant
    Filed: June 23, 2006
    Date of Patent: August 21, 2007
    Assignee: Touch Micro-System Technology Inc.
    Inventor: Hsien-Lung Ho
  • Patent number: 7256128
    Abstract: A wafer, having at least a spindle region and at least two through regions alongside the spindle region, is provided. The wafer in the spindle region is partially removed from the bottom surface. Thereafter, the bottom surface is bonded to a carrier with a bonding layer, and the wafer in the through regions is completely removed from the top surface.
    Type: Grant
    Filed: October 12, 2004
    Date of Patent: August 14, 2007
    Assignee: Touch Micro-System Technology Inc.
    Inventor: Chen-Hsiung Yang
  • Patent number: 7235185
    Abstract: A wafer comprising a front surface and a back surface is provided. The wafer further includes a front pattern on the front surface, the front pattern having a plurality of holes. A low-viscosity fluid is formed on the front surface and filled into the holes. Following that, a high-viscosity fluid is formed and filled into the holes by diffusion.
    Type: Grant
    Filed: November 7, 2005
    Date of Patent: June 26, 2007
    Assignee: Touch Micro-System Technology Inc.
    Inventor: I-Ju Chen
  • Patent number: 7192842
    Abstract: A first wafer is provided, and a photosensitive masking-and-bonding pattern is formed on the surface of the first wafer. Then, an etching process using the photosensitive masking-and-bonding pattern as a hard mask is performed to form a wafer pattern on the surface of the first wafer. Finally, the first wafer is bonded to a second wafer with the photosensitive masking-and-bonding pattern.
    Type: Grant
    Filed: January 20, 2005
    Date of Patent: March 20, 2007
    Assignee: Touch Micro-Systems Technology Inc.
    Inventors: Shih-Feng Shao, Hsin-Ya Peng, Chen-Hsiung Yang
  • Patent number: 7045463
    Abstract: A method of etching cavities having different aspect ratios. An etching stop layer is formed on the bottom surface of a substrate, and a mask pattern is formed on the top surface of the substrate. The mask pattern includes a plurality of sacrificial patterns positioned on both a first cavity predetermined region and a second cavity predetermined region. Then, an etching process is performed to remove the substrate not covered by the mask layer. Then, the etching stop layer is removed, as well as the sacrificial patterns and the substrate covered by the sacrificial patterns.
    Type: Grant
    Filed: October 28, 2004
    Date of Patent: May 16, 2006
    Assignee: Touch Micro-System Technology Inc.
    Inventor: Chen-Hsiung Yang
  • Patent number: 7008821
    Abstract: A method of forming a wafer backside interconnecting wire includes forming a mask layer on the back surface, the mask layer including at least an opening corresponding to the bonding pad, performing a first etching process from the back surface to remove the wafer unprotected by the mask layer to form a recess, removing the mask layer, and forming an interconnecting wire on the back surface.
    Type: Grant
    Filed: November 19, 2004
    Date of Patent: March 7, 2006
    Assignee: Touch Micro-System Technology Inc.
    Inventors: Shih-Feng Shao, Chen-Hsiung Yang, Hsin-Ya Peng
  • Publication number: 20030184234
    Abstract: An electrode device for a plasma processing system is presented. The electrode device is installed in a chamber of the plasma processing system. The electrode device comprises a plurality of electrode assemblies. Each electrode assembly has at least one first electrode and at least one second electrode. The first electrode is connected to a first output of a power supply, and the second electrode, connected to a second output of the power supply. Each electrode assembly is spaced apart from each other so as to generate plasma in the chamber. The electrode assembly comprises at least two electrodes (the first electrode and the second electrode) with shorter distance between the electrodes, and the type of the power supply can be altered to increase the electric field intensity, the hollow cathode effect, plasma density and uniformity. The electrode device can raise the efficiency in processing the object, and increase the uniformity of the electric field and upgrade the quality of the object.
    Type: Application
    Filed: November 13, 2002
    Publication date: October 2, 2003
    Applicants: Nano Electronics and Micro System Technologies, Inc., S&S Laminates Corporation
    Inventors: Chia-Yuan Hsu, Yong-Hau Foo, Jin-Fong Yen, Yeou-Yih Tsai, Chong-Ren Maa
  • Patent number: 6603091
    Abstract: A cleaning device with deeply reaching plasma and assisting electrodes has supporting racks, a chamber, a plasma sources, metallic grids. Flat boards to be cleaned such as circuit boards are located in the supporting racks. The supporting racks are disposed in the chamber. The metallic grids are disposed on two sides of the chamber. The plasma source is disposed next to the metallic grids. Electric voltage is applied to the metallic grids such that plasma from the plasma source can be pushed deeply into the supporting racks to evenly and sufficiently clean the circuit boards.
    Type: Grant
    Filed: April 4, 2002
    Date of Patent: August 5, 2003
    Assignee: Nano Electronics and Micro System Technologies, Inc.
    Inventors: Chia-Yuan Hsu, Yong-Hau Foo, Paul Hong