Patents Assigned to Microchip Technology Caldicot Limited
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Publication number: 20240071851Abstract: An electronic device package includes a frame, an electronic device mounted to the frame, surface-mount leads, and a gel at least partially filling a cavity between the electronic device and the frame. The electronic device includes electronic circuitry provided on an electronic device substrate, and the surface-mount leads are electrically connected to the electronic circuitry and extend laterally and outwardly from an outer perimeter of the frame. The gel in the cavity covers the electronic circuitry.Type: ApplicationFiled: October 10, 2022Publication date: February 29, 2024Applicant: Microchip Technology Caldicot LimitedInventors: Piers Tremlett, Dan Chenery, Stylianos Syrigos
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Publication number: 20230326834Abstract: An apparatus includes a busbar and a heat-generating electronic device mounted on a first side of the busbar, the heat-generating electronic device being electrically and thermally coupled to the first side of the busbar. The busbar includes an array of non-planar physical structures on a second side of the busbar opposite the first side of the busbar. The apparatus includes a dielectric coating on the array of non-planar physical structures, the dielectric coating defining a non-planar dielectric surface on the second side of the busbar.Type: ApplicationFiled: October 31, 2022Publication date: October 12, 2023Applicant: Microchip Technology Caldicot LimitedInventors: Piers Tremlett, George Taylor
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Publication number: 20230291182Abstract: A device includes a multiple-wavelength (e.g., dual wavelength) vertical-cavity surface-emitting laser (VCSEL) array including a first VCSEL set including one or more first VCSEL to emit first VCSEL radiation at a first wavelength, and a second VCSEL set including one or more second VCSEL to emit second VCSEL radiation at a second wavelength different than the first wavelength. The device includes upstream optics to upstream optics to (a) collimate the first VCSEL radiation emitted by the first VCSEL set and (b) collimate the second VCSEL radiation emitted by the second VCSEL set. The device also includes a vapor cell to receive the collimated first VCSEL radiation and the collimated second VCSEL radiation and to provide an output beam as a function of the received collimated first VCSEL radiation and collimated second VCSEL radiation, and measurement circuitry to analyze the output beam provided by the vapor cell.Type: ApplicationFiled: March 8, 2023Publication date: September 14, 2023Applicants: Microchip Technology Caldicot Limited, NPL Management LimitedInventors: Tracy Wotherspoon, Daniel Graham, Robert Bowen, Mohsin Haji
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Patent number: 11538732Abstract: A method for forming a board assembly includes identifying a location of a hot-spot on a semiconductor die and cutting an opening in a circuit board corresponding to the location of the identified hot-spot. A Chemical Vapor Deposition Diamond (CVDD) window is inserted into the opening. A layer of thermally conductive paste is applied over the CVDD window. The semiconductor die is placed over the layer of thermally conductive paste such that the CVDD window underlies the hot-spot and such that a surface of the semiconductor die is in direct contact with the layer of thermally conductive paste.Type: GrantFiled: October 4, 2021Date of Patent: December 27, 2022Assignee: MICROCHIP TECHNOLOGY CALDICOT LIMITEDInventors: Philip Andrew Swire, Nina Biddle
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Publication number: 20220361329Abstract: A method includes providing a layer of non-conductive material having a conductive electroplating seed layer formed on a surface thereof; applying a photoresist layer over the surface of the conductive electroplating seed layer; and defining wiring channels in the photoresist resist layer. The method includes electroplating a conductive material in the defined wiring channels; adhering a non-conductive layer over the photoresist layer and the plated conductive material in the wiring channels; and removing the layer of non-conductive material and the conductive electroplating seed layer.Type: ApplicationFiled: July 19, 2022Publication date: November 10, 2022Applicant: Microchip Technology Caldicot LimitedInventors: John Adam Tracy deMercleden Smithells, Nina Biddle
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Patent number: 11488888Abstract: A method and apparatus for conducting heat away from a semiconductor die are disclosed. A board assembly is disclosed that includes a circuit board, a semiconductor die electrically coupled to the circuit board and a Chemical Vapor Deposition Diamond (CVDD) coated wire. A portion of the CVDD-coated wire extends between a hot-spot on the semiconductor die and the circuit board. The board assembly includes a layer of thermally conductive paste that is disposed between the hot-spot on the semiconductor die and the circuit board. The layer of thermally conductive paste is in direct contact with a portion of the CVDD-coated wire.Type: GrantFiled: December 24, 2019Date of Patent: November 1, 2022Assignee: MICROCHIP TECHNOLOGY CALDICOT LIMITEDInventors: Philip Andrew Swire, Nina Biddle
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Patent number: 11432402Abstract: A lamination circuit board structure lamination circuit board structure includes a printed circuit board substrate including conductive wiring traces on at least a first wiring face, a prepreg layer formed over the first wiring face, and a patch having an area smaller than 1,000 mm2. The patch includes conductive wiring traces formed on a wiring face and is laminated to the printed circuit board substrate over the prepreg layer, oriented with the wiring face in contact with and pressed into the prepreg layer. Portions of the prepreg layer fill interstices between the conductive wiring traces.Type: GrantFiled: November 12, 2018Date of Patent: August 30, 2022Assignee: Microchip Technology Caldicot LimitedInventors: John Adam Tracy deMercleden Smithells, Nina Biddle
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Publication number: 20220028753Abstract: A method for forming a board assembly includes identifying a location of a hot-spot on a semiconductor die and cutting an opening in a circuit board corresponding to the location of the identified hot-spot. A Chemical Vapor Deposition Diamond (CVDD) window is inserted into the opening. A layer of thermally conductive paste is applied over the CVDD window. The semiconductor die is placed over the layer of thermally conductive paste such that the CVDD window underlies the hot-spot and such that a surface of the semiconductor die is in direct contact with the layer of thermally conductive paste.Type: ApplicationFiled: October 4, 2021Publication date: January 27, 2022Applicant: Microchip Technology Caldicot LimitedInventors: Philip Andrew Swire, Nina Biddle
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Patent number: 11189543Abstract: A method and apparatus for conducting heat away from a semiconductor die are disclosed. A board assembly is disclosed that includes a first circuit board having an opening extending through the first circuit board. A Chemical Vapor Deposition Diamond (CVDD) window extends within the opening. A layer of thermally conductive paste extends over the CVDD window. A semiconductor die extends over the layer of thermally conductive paste such that a hot-spot on the semiconductor die overlies the CVDD window.Type: GrantFiled: September 12, 2019Date of Patent: November 30, 2021Assignee: Microchip Technology Caldicot LimitedInventors: Philip Andrew Swire, Nina Biddle