Patents Assigned to Microelectronics Technology Inc.
  • Patent number: 12266913
    Abstract: An abnormal current protection device includes an overcurrent protector and a controller, and the overcurrent protector includes a short-circuit detection unit and an overcurrent detection unit. The short-circuit detection unit is configured to detect whether there is a short-circuit event within a period of debounce time of a protection cycle. The overcurrent detection unit is configured to detect whether there is an overcurrent event after the period of debounce time within the protection cycle. The controller is configured to disable a converter when the short-circuit event is detected, and disable a power stage when the overcurrent event is detected.
    Type: Grant
    Filed: April 18, 2023
    Date of Patent: April 1, 2025
    Assignee: Elite Semiconductor Microelectronics Technology Inc.
    Inventor: Isaac Y. Chen
  • Patent number: 12267072
    Abstract: An electronic device includes a sampling circuit and a summing circuit coupled with the sampling circuit. The sampling circuit samples a pulse width of a first input pulse of a PWM input signal since a first time point on a rising edge of a clock pulse of a clock signal. The summing circuit generates a first output pulse of a PWM output signal since a second time point on a falling edge of the clock pulse. A pulse width of the first output pulse is a summation of the pulse width of the first input pulse and a pulse width of a second input pulse of the PWM input signal, and the second input pulse is the next pulse after the first input pulse.
    Type: Grant
    Filed: March 23, 2023
    Date of Patent: April 1, 2025
    Assignee: Elite Semiconductor Microelectronics Technology Inc.
    Inventors: Chih-Sheng Chang, Isaac Y. Chen
  • Patent number: 12237834
    Abstract: An electronic device and a method for overcurrent detection are disclosed herein. The electronic device causes a high-side offsetting voltage drop and converts a voltage difference between a first voltage at an input terminal of an upper-bridge power component of a power stage and a sum of a first balancing voltage drop and the high-side offsetting voltage drop into a first current. The electronic device further converts a voltage difference between a second voltage of an output terminal of the upper-bridge power component and a second balancing voltage drop into a second current, compares the first current and the second current, and generates a high-side overcurrent protection (OCP) signal with logic high for a driver of the power stage when the first current is stronger than the second current, such that the driver turns off the upper-bridge power component accordingly.
    Type: Grant
    Filed: October 6, 2023
    Date of Patent: February 25, 2025
    Assignee: Elite Semiconductor Microelectronics Technology Inc.
    Inventors: Isaac Y. Chen, Chih-Sheng Chang
  • Publication number: 20250060724
    Abstract: An inductor driving device includes multiple switching elements and a control circuit, wherein an inductor is driven according to switching of the multiple switching elements. The control circuit is arranged to generate a control signal for controlling the multiple switching elements. In a first mode, the control signal has a constant frequency. In a second mode, the control circuit adjusts a frequency of the control signal and continuously changes a current direction of the inductor, to generate one of multiple audio signals through the inductor.
    Type: Application
    Filed: August 18, 2023
    Publication date: February 20, 2025
    Applicant: Elite Semiconductor Microelectronics Technology Inc.
    Inventors: Ming-Fu Tsai, Sheng-Hung Hsu
  • Publication number: 20250060398
    Abstract: A capacitance measurement circuit includes a charge to voltage converter (CVC) that includes at least one first variable capacitor, an excitation signal generation circuit, a differential amplifier, a first switch circuit, and at least one second variable capacitor, wherein a parasitic capacitance from a sensing capacitance sensed by a capacitance sensor is reduced by the at least one first variable capacitor. The excitation signal generation circuit is arranged to generate and connect a first excitation signal to the capacitance sensor, and generate and connect a second excitation signal to the at least one first variable capacitor, wherein the first excitation signal and the second excitation signal are out-of-phase, and a voltage amplitude of the first excitation signal is different from a voltage amplitude of the second excitation signal. The inverting input terminal of the differential amplifier is arranged to receive the sensing capacitance from the capacitance sensor.
    Type: Application
    Filed: August 18, 2023
    Publication date: February 20, 2025
    Applicant: Elite Semiconductor Microelectronics Technology Inc.
    Inventor: Yi-Chou Huang
  • Patent number: 12184246
    Abstract: A driving circuit of a loudspeaker includes a periodic signal generation circuit, a signal processing circuit, a class-D amplifier circuit, a current sensing circuit, and a sample and hold circuit. The periodic signal generation circuit is arranged to generate a periodic signal and a control signal. The signal processing circuit is coupled to the periodic signal generation circuit, and is arranged to generate a pre-driving signal. The class-D amplifier circuit is coupled to the signal processing circuit, and is arranged to drive the loudspeaker according to the pre-driving signal. The current sensing circuit is coupled to the class-D amplifier circuit, and is arranged to generate a current sensing signal. The sample and hold circuit is coupled to the periodic signal generation circuit and the current sensing circuit, and is arranged to sample and hold the current sensing signal according to the control signal, to generate a current sampling signal.
    Type: Grant
    Filed: January 5, 2022
    Date of Patent: December 31, 2024
    Assignee: Elite Semiconductor Microelectronics Technology Inc.
    Inventors: Che-Wei Hsu, Wun-Long Yu
  • Patent number: 12166372
    Abstract: A linear charger includes a constant current charging circuit and a thermal regulation circuit. The constant current charging circuit is arranged to generate a charging current, and includes a first transconductance amplifier, wherein the first transconductance amplifier has a positive terminal, a negative terminal, and an output terminal. The thermal regulation circuit is coupled to the output terminal and the negative terminal of the first transconductance amplifier, and is arranged to generate and modulate a thermal regulation current and an amplifier reference voltage with temperature, and transmit the thermal regulation current and the amplifier reference voltage to the output terminal and the negative terminal of the first transconductance amplifier, respectively.
    Type: Grant
    Filed: December 23, 2021
    Date of Patent: December 10, 2024
    Assignee: Elite Semiconductor Microelectronics Technology Inc.
    Inventor: Yao-Wei Yang
  • Publication number: 20240348186
    Abstract: A method for estimating a rotor angle and a rotor speed of a permanent magnet synchronous motor (PMSM) includes: receiving a d-axis voltage driving signal of the PMSM, and obtaining a first estimated rotor speed of the PMSM according to the d-axis voltage driving signal; receiving a speed command, and obtaining a second estimated rotor speed of the PMSM according to the speed command; performing a weighting adjustment operation upon the first estimated rotor speed and the second estimated rotor speed to obtain a third estimated rotor speed for estimating the rotor speed of the PMSM; and performing an integration operation upon the third estimated rotor speed to obtain an estimated rotor angle for estimating the rotor angle of the PMSM.
    Type: Application
    Filed: April 12, 2023
    Publication date: October 17, 2024
    Applicant: Elite Semiconductor Microelectronics Technology Inc.
    Inventor: Ru-Chang Wu
  • Patent number: 12092672
    Abstract: A capacitance measure circuit includes a charge to voltage converter (CVC), and the CVC includes an excitation signal generation circuit that is arranged to generate and connect an excitation signal to a first terminal of a capacitance sensor, a differential amplifier, a first switch circuit, and at least one first variable capacitor. The inverting input terminal of the differential amplifier is arranged to receive a sensing capacitance value from a second terminal of the capacitance sensor. The first switch circuit is coupled between the inverting input terminal and the non-inverting output terminal of the differential amplifier, and is connected in parallel with the at least one first variable capacitor at the inverting input terminal and the non-inverting output terminal of the differential amplifier.
    Type: Grant
    Filed: October 12, 2022
    Date of Patent: September 17, 2024
    Assignee: Elite Semiconductor Microelectronics Technology Inc.
    Inventor: Yi-Chou Huang
  • Publication number: 20240272616
    Abstract: A control method applied to a servomotor, wherein the servomotor includes a motor, and the control method includes: setting a mode of the servomotor as a predetermined mode corresponding to a predetermined communication protocol; receiving an input signal from a controller for controlling the motor, wherein the controller is coupled to the servomotor; and switching the mode of the servomotor from the predetermined mode to one of a plurality of candidate modes according to a frequency of the input signal.
    Type: Application
    Filed: February 15, 2023
    Publication date: August 15, 2024
    Applicant: Elite Semiconductor Microelectronics Technology Inc.
    Inventors: Ming-Fu Tsai, Sheng-Hung Hsu
  • Publication number: 20240178796
    Abstract: An audio amplifier includes a plurality of power stages, a driving circuit, and a power stage control circuit. The driving circuit is arranged to drive the power stages. The power stage control circuit includes a feedback circuit and a control circuit. The feedback circuit is coupled to the power stages, and is arranged to generate a feedback signal according to at least one detection input, wherein the at least one detection input includes at least one of a power, a voltage signal corresponding to a switching time of the power stages, and a voltage signal corresponding to a switching frequency of the power stages. The control circuit is coupled between the feedback circuit and the power stages, and is arranged to generate a control signal according to the feedback signal, wherein the control signal is arranged to dynamically control a number of turned-on power stages in the power stages.
    Type: Application
    Filed: November 29, 2022
    Publication date: May 30, 2024
    Applicant: Elite Semiconductor Microelectronics Technology Inc.
    Inventor: Isaac Y. Chen
  • Publication number: 20240133934
    Abstract: A capacitance measure circuit includes a charge to voltage converter (CVC), and the CVC includes an excitation signal generation circuit that is arranged to generate and connect an excitation signal to a first terminal of a capacitance sensor, a differential amplifier, a first switch circuit, and at least one first variable capacitor. The inverting input terminal of the differential amplifier is arranged to receive a sensing capacitance value from a second terminal of the capacitance sensor. The first switch circuit is coupled between the inverting input terminal and the non-inverting output terminal of the differential amplifier, and is connected in parallel with the at least one first variable capacitor at the inverting input terminal and the non-inverting output terminal of the differential amplifier.
    Type: Application
    Filed: October 12, 2022
    Publication date: April 25, 2024
    Applicant: Elite Semiconductor Microelectronics Technology Inc.
    Inventor: Yi-Chou Huang
  • Patent number: 11942950
    Abstract: An input clock buffer, comprising: a first capacitor; a second capacitor; a first amplifier, configured to generate a first output signal, comprising input terminals coupled to the first capacitor and the second capacitor, wherein the first capacitor and the second capacitor receives a differential input signal; a second amplifier, configured to generate a second output signal according to the differential input signal; a frequency detection circuit, configured to generate a frequency detection signal according to a frequency of the differential input signal; and a switch, located between an output of the first amplifier and an output of the second amplifier, configured to turn on and turn off according to the frequency detection signal.
    Type: Grant
    Filed: June 23, 2022
    Date of Patent: March 26, 2024
    Assignee: Elite Semiconductor Microelectronics Technology Inc.
    Inventor: Shu-Han Nien
  • Publication number: 20230421143
    Abstract: An input clock buffer, comprising: a first capacitor; a second capacitor; a first amplifier, configured to generate a first output signal, comprising input terminals coupled to the first capacitor and the second capacitor, wherein the first capacitor and the second capacitor receives a differential input signal; a second amplifier, configured to generate a second output signal according to the differential input signal; a frequency detection circuit, configured to generate a frequency detection signal according to a frequency of the differential input signal; and a switch, located between an output of the first amplifier and an output of the second amplifier, configured to turn on and turn off according to the frequency detection signal.
    Type: Application
    Filed: June 23, 2022
    Publication date: December 28, 2023
    Applicant: Elite Semiconductor Microelectronics Technology Inc.
    Inventor: Shu-Han Nien
  • Publication number: 20230387004
    Abstract: An integrated circuit die forming method, for forming a plurality of integrated circuit dies on a semiconductor wafer, comprising: forming a first device, a second device in a first die in a first area; forming a metal layer connected to the first device and the second device; forming a third device, a fourth device in a second die in a second area; forming the metal layer connected to the third device and the fourth device, wherein a scribe area exists between the first area and the second area is separated by; wherein the first device and the third device are used for synchronization and are components of a class D amplifier; wherein the second device is used for preventing leakage currents of the first die and the fourth device is used for preventing leakage currents of the second die.
    Type: Application
    Filed: May 26, 2022
    Publication date: November 30, 2023
    Applicant: Elite Semiconductor Microelectronics Technology Inc.
    Inventors: Chih-Sheng Chang, Isaac Y. Chen
  • Patent number: 11777424
    Abstract: A method for determining an initial rotor position of a permanent magnet synchronous motor (PMSM) includes: generating a plurality of transient currents by applying a plurality of voltages to each phase stator winding of a three phase stator winding of the PMSM; generating three phase current differences according to the plurality of transient currents; determining a first zone in which the initial rotor position of the PMSM is located according to the three phase current differences, wherein angles between 0-360 degrees are divided into a plurality of zones, and the first zone is selected from the plurality of zones; calculating three line current differences according to the three phase current differences; and determining the initial rotor position of the PMSM according to the first zone and the three line current differences.
    Type: Grant
    Filed: October 6, 2021
    Date of Patent: October 3, 2023
    Assignee: Elite Semiconductor Microelectronics Technology Inc.
    Inventors: Shih-Chieh Wang, Yong-Yi Jhuang, Ming-Fu Tsai
  • Patent number: 11770080
    Abstract: A method for increasing a resolution by N bits performed by a processing circuit of a motor driving system, where N is a positive integer, and the method includes: performing a conversion upon an analog command, to generate a command count value; performing a first N-bit right-shifting operation upon the command count value, to generate an initial output value; performing a logical operation upon the command count value, to generate a low bit value; generating an overflow value according to the low bit value; and determining a final output value according to the initial output value and the overflow value.
    Type: Grant
    Filed: June 20, 2022
    Date of Patent: September 26, 2023
    Assignee: Elite Semiconductor Microelectronics Technology Inc.
    Inventor: Ming-Fu Tsai
  • Patent number: 11757420
    Abstract: A leveling equalizer includes a graphic equalizer circuit, a first multiplication circuit, a second multiplication circuit, an addition circuit, and a gain control circuit. The graphic equalizer circuit processes a first input signal and output a first output signal and a second output signal. The first multiplication circuit multiplies the first output signal and one of an adjustable gain value and a fixed gain value to generate a first adjusted output signal. The second multiplication circuit multiplies the second output signal and another of the adjustable gain value and the fixed gain value to generate a second adjusted output signal. The addition circuit combines the first adjusted output signal and the second adjusted output signal to generate an equalizer output signal. The gain control circuit dynamically adjusts the adjustable gain value according to the equalizer output signal.
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: September 12, 2023
    Assignee: Elite Semiconductor Microelectronics Technology Inc.
    Inventor: Jung-Kuei Chang
  • Patent number: 11750123
    Abstract: A control circuit arranged to detect an initial rotor position of a brushless DC motor includes: a voltage integrator circuit, arranged to perform integration upon an input voltage, to generate a plurality of integrated voltages; a PWM generating circuit, arranged to generate and output a plurality of PWM signals to the brushless DC motor through a drive circuit, and stop outputting a PWM signal that is any of the plurality of PWM signals to the brushless DC motor according to an integrated voltage corresponding to the PWM signal; a current receiving circuit, arranged to receive a plurality of feedback currents from the brushless DC motor; a comparison circuit, arranged to perform comparison upon the plurality of feedback currents, to generate a comparison result; and a decision circuit, arranged to detect the initial rotor position according to the comparison result.
    Type: Grant
    Filed: June 16, 2022
    Date of Patent: September 5, 2023
    Assignee: Elite Semiconductor Microelectronics Technology Inc.
    Inventor: Ming-Fu Tsai
  • Patent number: 11727968
    Abstract: A signal processing circuit includes a delay locked loop (DLL) circuit, a data output path circuit, and a first phase detector circuit. The DLL circuit is arranged to receive a memory clock signal, and generate a DLL output signal according to the memory clock signal and a DLL feedback signal. The data output path circuit is coupled to the DLL circuit, and is arranged to generate a DQS signal according to the DLL output signal. The first phase detector circuit is coupled to the data output path circuit, and is arranged to receive the memory clock signal and the DQS signal, and detect a phase difference between the memory clock signal and the DQS signal to generate a first phase detection result.
    Type: Grant
    Filed: October 13, 2021
    Date of Patent: August 15, 2023
    Assignee: Elite Semiconductor Microelectronics Technology Inc.
    Inventors: Po-Hsun Wu, Jen-Shou Hsu