Abstract: A battery charger for an electronic device receives current limited power from an external power source, such as a Universal Serial Bus power interface. The battery charger can linearly regulate a charging current to an internal battery and limit the charging current so as not to demand current in excess of what the external power source can provide. A bi-directional pass element coupled between a system power terminal and the internal battery controls the charging current and effectively isolates the internal battery from a system load during charging of the battery while providing a low impedance path from the internal battery to the system load during discharging of the battery.

Abstract: A system for generating, delivering and distributing electrical power to network elements over a data communication network infrastructure within a building, campus or enterprise. Consolidating power distribution and data communications over a single network simplifies and reduces the cost of network element installation and provides a means of supplying uninterrupted or backup power to critical network devices in the event of a power failure. The invention includes power/data combiners that combine a data communication signal with a low frequency power signal. The combined signal is transported over the LAN infrastructure where a power/data splitter extracts the data signal and the power signal and generates two separate outputs. The power over LAN system of the present invention operates with high bandwidth data communication networks, i.e., 10 Mbps, 100 Mbps, 1000 Mbps.

Abstract: The invention includes methods for precisely and accurately etching layers of wide bandgap semiconductor material. According to one aspect of the invention, the method includes providing a multi-layer laminate including at least a first and second layer of wide bandgap semiconductor material, measuring a first conductance of the first layer of semiconductor material, partially etching the first layer of semiconductor material a first amount, measuring a second conductance of the first layer of semiconductor material etched the first amount, and utilizing the first and second measured conductance to determine a time required to etch the first layer of semiconductor material a second amount.

Abstract: A plurality of single-phase synchronizing converter automatically synchronize on a peer-to-peer basis. Each synchronizing converter is configured as a DC-to-DC converter. The synchronizing converters operate in parallel as a multi-phase converter. A common bus between the synchronizing converters includes a sync line and a common phase control line. Proper phasing automatically occurs when power is applied, and the phasing changes automatically as converters are added or removed. When the system powers up, the converters arbitrate for phase position. The phasing positions are random, but the phasing is relatively symmetrical regardless of the number of phases. In one embodiment, a hot-swappable converter module can be plugged into any location of a parallel multiphase bus to produce a common output voltage. When an additional module is plugged in, the converters readjust their phases to maintain phase symmetry. In one embodiment, each module shares a substantially equal portion of the output load.

Abstract: A reference voltage device that consists of a series combination of reverse biased p-n junctions, forward biased p-n junctions, and Schottky hot carrier diodes. The relatively low voltage and low negative temperature coefficient of Schottky diodes permit great flexibility in correcting areas of nonlinearity in the offsetting temperature dependent characteristics of conventional forward biased junctions and zener diodes. Because of the stability of Schottky hot carrier diodes to radiation, the method and apparatus of this invention are particularly suitable for designing radiation hardened reference diodes, as well. Finally, the Schottky forward biased diode is suitable for integration into a single monolithic chip structure in series with conventional reverse and forward biased p-n junctions.