Abstract: A cavity filter having two series of resonance chambers bilaterally connected between an antenna port and two opposing signal input/output ports, each series of resonance chambers having the last resonance chamber thereof connected to the antenna port and the first resonance chamber thereof connected between the respective signal input/output port and the associating last resonance chamber to perform cross-coupling feedback, improving the quality of the signal received by the signal receiver using the cavity filter and enhancing signal transmission performance.

Abstract: A cavity filter having two series of resonance chambers symmetrically and bilaterally connected between an antenna port and two opposing signal input/output ports in a resonant space therein, each series of resonance chambers having the last resonance chamber thereof connected to the antenna port and the first resonance chamber thereof connected to the respective signal input/output port and kept in communication with the associating last resonance chamber through one respective channel and the second resonance chamber thereof kept in communication with the last second resonance chamber thereof through one respective channel to provide cross-coupling feedback, getting better stop-band flatness and improving signal quality.

Abstract: A joint synchronizer and decoder that implements two decision aided processes, which are referred to as “decision aided candidate selection” and “decision aided synchronization and decoding.” Decision aided candidate selection may be used to select a carrier frequency offset by selecting among a number of candidates for this parameter based on an indication of decoding success. Decision aided synchronization and decoding may be used for phase tracking based on an indication of decoding success. Although these joint synchronizing and decoding techniques may be implemented together, they may also be implemented independently. The joint synchronizer and decoder may be implemented within a return channel receiver in a DVB-RCS system using turbo coding and quadrature phase shift key (QPSK) data modulation.

Abstract: The present invention relates to a method for reducing cycle slips in a carrier recovery loop for a phase detector, the method comprising the steps of receiving an input signal consisting of samples, each received sample having an in-phase (I) and quadrature-phase (Q) component, providing the input signal to a phase error estimator adapted to determine a phase error estimate, providing the phase error estimate to a loop filter, and forming an output signal from the carrier recovery loop by subtracting an output from the loop filter from the input signal, wherein the phase error estimate is determined based on a combination of the amplitude and phase of the samples and a probability measure for a specifically transmitted symbol, thereby improving phase tracking performance of the carrier recovery loop.

Abstract: An antenna feed coupling structure of a duplexer is disclosed to include a base defining a detoured resonance cavity and a T-shaped feed-in cavity perpendicularly intersecting the resonance cavity and a signal input port in connection with the head of the feed-in cavity, a cover closing the base, and adjustment rods mounted in the base and suspending in the resonance cavity and the feed-in cavity. The adjustment rods include two feed-in adjustment rods and two coupling structure adjustment rods suspending in the intersected area between the resonance cavity and the feed-in cavity and respectively kept in horizontal and in vertical relative to the resonance cavity and rotatable inwards and outwards to adjust the feed-in amount and coupling structure amount of the antenna feed coupling structure respectively.

Abstract: A joint synchronizer and decoder that implements two decision aided processes, which are referred to as “decision aided candidate selection” and “decision aided synchronization and decoding.” Decision aided candidate selection may be used to select a carrier frequency offset by selecting among a number of candidates for this parameter based on an indication of decoding success. Decision aided synchronization and decoding may be used for phase tracking based on an indication of decoding success. Although these joint synchronizing and decoding techniques may be implemented together, they may also be implemented independently. The joint synchronizer and decoder may be implemented within a return channel receiver in a DVB-RCS system using turbo coding and quadrature phase shift key (QPSK) data modulation.

Abstract: An antenna feed coupling structure of a duplexer is disclosed to include a base defining a detoured resonance cavity and a T-shaped feed-in cavity perpendicularly intersecting the resonance cavity and a signal input port in connection with the head of the feed-in cavity, a cover closing the base, and adjustment rods mounted in the base and suspending in the resonance cavity and the feed-in cavity. The adjustment rods include two feed-in adjustment rods and two coupling structure adjustment rods suspending in the intersected area between the resonance cavity and the feed-in cavity and respectively kept in horizontal and in vertical relative to the resonance cavity and rotatable inwards and outwards to adjust the feed-in amount and coupling structure amount of the antenna feed coupling structure respectively.

Abstract: A hybrid carrier frequency offset estimator that uses data-aided and non-data-aided signal processing techniques to produce multiple candidates for the carrier frequency offset within a return channel receiver in a DVB-RCS system using turbo coding and quadrature phase shift keying (QPSK) data modulation. In this system, the invention is employed to estimate signal distortion caused by carrier frequency offset so that this particular source of signal distortion can be removed to improve the ability of the receiver to maintain synchronization in low signal-to-noise conditions. This, in turn, allows the receiver to meet the DVB-RCS performance target, measured in terms of packet loss ratio, in low signal-to-noise ratio conditions and in particular for burst-mode data transmission with a short data packet size.

Abstract: A reverse-phase cross coupling structure includes a base, which has a resonance chamber, resonators vertically arranged in parallel in the resonance chamber, and coupling portions respectively coupled between each two adjacent resonators, each coupling portion having a top recess and a coupling hole in the top recess, and an adjustment device, which comprises a cover plate fixedly covered on the base and has through holes corresponding to the coupling holes of the coupling portions and a plurality of adjustment screws respectively inserted through the through holes of the cover plate and threaded into the coupling holes of the coupling portions to the desired elevation to regulate the amount of the reverse-phase cross coupling of the resonators. This novel reverse-phase cross coupling structure is achieved only by base and adjustment device, it is not necessary to employ extra parts as in the prior designs.

Abstract: There is disclosed a burnable used oil fuel product by the process comprising: (a) obtaining a used oil sample having at least 1% (by weight) aqueous substances; (b) heating the used oil sample to a temperature of from about 20° C. to about 60° C.; and (c) extracting a volume of water from the heated used oil by adding super critical CO2.

Abstract: An RF combiner, of the Wilkinson type, capable of very wide band and high power continuous wave (CW) energy transmission, e.g., of a 5 way design, consisting of 5 input connected transformers coupled to two output providing transformers, with 5 balancing resistors respectively connected between the input terminals to the input connected transformers. The transformers are provided with ferrite cores in the form of one block for the input transformers and one block for the output transformers and the broader frequency band is obtained by properly selecting the ferrite material of the blocks making up the transformer cores, preferably with a permeability of 1600 that will provide a 2-150 MHz frequency range.

Abstract: The junction field effect transistors (JFETs) of this invention have improved breakdown voltage capability, reduced on-resistance and improved overdrive capability. The JFET on-resistance is decreased by ion-implanting an insulating layer covering a layer that contains the source and gate regions of the unipolar transistor. The charge of the implanted ions is the same as the charge polarity of the gate regions. To improve the overdrive capability of a JFET a region of conductivity opposite to the conductivity of the gate region is formed in the gate region of the transistor. This region of opposite conductivity creates another junction within the gate region i.e., the junction between the region of opposite conductivity and the gate region, and the junction between the gate region and the layer containing the gate region.

Abstract: A switch is described that includes a plunger (20, FIG. 1 ) moveable between up and down position and having upper contacts (22, 24) and lower contacts (26, 28). When the plunger is moved to a down position, opposite ends of the upper contact (22) move down against first and second terminals (12, 14) to interconnect them. When the plunger is moved to an up position, opposite ends of the lower contact (26) move up against the first terminal (12) and a third terminal (16) to interconnect them. The plunger can move within a hole in a circuit board and carry two upper and two lower contacts to connect four terminals in two different ways. Each terminal can include upper and lower terminal pads (120, 122, FIG. 5 ) lying respectively on upper and lower surfaces of the circuit board and interconnected through plated-through holes (124) in the board.

Abstract: A protective coating useful as a passivation layer for semiconductor devices incorporates a thin film of an amorphous diamond-like carbon. In one implementation, a thin film of amorphous silicon is deposited over the carbon material. The semiconductive passivation coating prevents electrical shorts, dissipates charge build-up and protects against chemical contamination.

Abstract: A protective coating useful as a passivation layer for semiconductor devices incorporates a thin film of an amorphous diamond-like carbon. In one implementation, a thin film of amorphous silicon is deposited over the carbon material. The semiconductive passivation coating eliminates electrical shorts, dissipates charge build-up and protects against chemical contamination.

Abstract: One embodiment of a process in accordance with our invention includes the step of forming a P type region on a semiconductor substrate. After the P type region is formed, an N type layer is epitaxially grown on the P type region. A Schottky gate is then formed on the N type epitaxial layer. A first portion of the epitaxial layer serves as a transistor source, a second portion of the epitaxial layer serves as the transistor drain, and a third portion of the epitaxial layer serves as the channel. Of importance, the P type semiconductor region helps prevent various short channel effects caused when current carriers flowing between the source and drain flow too far from the Schottky gate.

Abstract: A DC bias line module for use with an r.f. signal processing apparatus which incorporates terminating resistors, in lieu of capacitors, that are connected to the r.f. line.

Abstract: A series biasing arrangement for a pair of junction field effect transistors (JFETs), which may be used in RF amplifiers, mixers or oscillators, comprises connecting the JFETs together in series, with the gates of the two JFETs selectively connected to different reference potentials. The first FET is also connected to the DC voltage source. In one embodiment of the invention, two operational amplifiers, whose output leads are connected to the gates of corresponding JFETs have their noninverting input leads connected to selected points on a voltage divider made up of three resistors and their inverting input leads each connected to the source of a corresponding JFET. The drain to source voltage drops across the JFETs are controlled solely by the values of two of the resistors in the three resistor voltage divider. The bias current through the series-connected JFETs can be controlled independently of the drain to source voltage drops across each of the JFETs.

Abstract: A series biasing arrangement for a pair of junction field effect transistors (JFETs), which may be used in RF amplifiers, mixers or oscillators, comprises connecting the JFETs together in series, with the gates of the two JFETs selectively connected to different reference potentials. The first FET is also connected to the DC voltage source. In one embodiment of the invention, two operational amplifiers, whose output leads are connected to the gates of corresponding JFETs have their noninverting input leads connected to selected points on a voltage divider made up of three resistors and their inverting input leads each connected to the source of a corresponding JFET. The drain to source voltage drops across the JFETs are controlled solely by the values of two of the resistors in the three resistor voltage divider. The bias current through the series-connected JFETs can be controlled independently of the drain to source voltage drops across each of the JFETs. The two FETs need not be closely matched.