Abstract: The present invention relates to a mixed mode electronic circuit that implements a PLL cell that employs an auto-range algorithm to lock to a wide range of input reference signals.

Abstract: A differential amplifier includes a first pair of differential amplifiers and a second pair of differential amplifiers. These first and second pairs of differential amplifiers are connected between first power rails and are arranged to receive a differential input signal. Third and fourth pairs of differential amplifiers are connected between second rails and also connected to the differential input signal. A current summer sums a first output current of the first pair of differential amplifiers, a second output current of the second pair of differential amplifiers, a third output current of the third pair of differential amplifiers and a fourth output current of a fourth pair of differential amplifiers to produce an output signal.

Abstract: A dual-mode switching voltage regulator has a duty cycle that varies with the input and output voltages so as to dynamically compensate for changes in the operating conditions. The switching voltage regulator uses input and output voltages/currents to optimize the duty cycle of the signals applied to a pair of switches disposed in the regulator. In the PFM mode, a control block senses the time that a first switch used to discharge an inductor is turned off. If the control block senses that the first switch is opened too early, the control block increases the on-time of a second switch used to charge the inductor. If the control block senses that the first switch is opened too late, the control block decreases the on-time of the second switch.

Abstract: A GPS baseband architecture provides flexibility and power consumption and chip area usage advantages. The GPS baseband architecture includes a first stage having a preamplifier coupled to a low noise amplifier, which is coupled to a mixer. A PLL provides the mixer with a frequency to convert a signal to a higher intermediate (IF) frequency. The output of the mixer is fed to a poly-phase filter. The output of the poly-phase filter is fed to a programmable gain amplifier (PGA), whose output is fed to an analog-to-digital converter (ADC) to produce an output GPS signal. A saturation bit of the ADC is used to control the PGA through a digital amplifier gain control (AGC) circuit.

Abstract: The present invention discloses a mixer comprising with an input stage (100) for receiving and amplifying input signals (VINP, VINN) and an output stage (300) for outputting output signals (Voutp, Voutn). A switching stage (200) is coupled between the input stage (100) and the output stage (300), the switching stage (200) mixing the amplified input signals with a local oscillator signal (vlop, vlon) to produce the output signals (Voutp, Voutn) at the output stage (300). An RC circuit (cop, rop; con, ron) is connected to the output stage (300) and adapted to move the pole of the output signals.