Patents Assigned to MIRISE Technology Corporation
  • Patent number: 11906832
    Abstract: A dual side view display includes a waveguide with an inside transparent layer and an outside transparent layer spaced apart from and parallel to the inside transparent layer, and a plurality of inside view liquid crystal (LC) pixels and a plurality of outside view LC pixels disposed within the waveguide. The plurality of outside view LC pixels are disposed within the waveguide parallel to and in-plane with the plurality of inside view LC pixels. The plurality of inside LC pixels includes a plurality of outside blocking layers configured to block light scattered in the plurality of inside view LC pixels from propagating through the outside transparent layer. Also, the plurality of outside view LC pixels includes a plurality of inside blocking layers configured to block light scattered in the plurality of outside view LC pixels from propagating through the inside transparent layer.
    Type: Grant
    Filed: July 28, 2022
    Date of Patent: February 20, 2024
    Assignees: Toyota Motor Engineering & Manufacturing North America, Inc., MIRISE Technology Corporation, Kent State University
    Inventors: Deng-Ke Yang, Yunho Shin, Guangkui Qin, Sean P. Rodrigues
  • Patent number: 11899044
    Abstract: A current sensor for a detection target current using a shunt resistor includes: a resistance value correction circuit having a correction resistor; a signal application unit that applies an alternating current signal to a series circuit of the shunt resistor and the correction resistor; a voltage detection unit that detects terminal voltages of the shunt resistor and the correction resistor; and a correction unit that calculates a resistance value of the shunt resistor and corrects the resistance value for detection; and a power supply circuit having a first power supply generation unit that generates a first power supply of the signal application unit from an input power supply of an outside; and a second power supply generation unit that generates a second power supply of the voltage detection unit.
    Type: Grant
    Filed: July 28, 2022
    Date of Patent: February 13, 2024
    Assignees: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA, MIRISE Technologies Corporation
    Inventors: Tomohiro Nezuka, Yoshikazu Furuta, Shotaro Wada
  • Patent number: 11890949
    Abstract: In a communication system, a control unit and driver units are connected in a daisy chain; each unit includes a corresponding insulated communication circuit, respectively. The control unit measures a communication delay time between the control unit and each driver unit from a response time to transmission of a pulse signal performed to each driver unit during a measurement period. Then, based on each communication delay time, the control unit transmits a shift time to each driver unit for equalizing the timing of signals output by the driver units. When each driver unit receives, from the control unit, an instruction instructing each driver unit to output a signal, each driver unit outputs the signal when the shift time has elapsed.
    Type: Grant
    Filed: April 18, 2022
    Date of Patent: February 6, 2024
    Assignees: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA, MIRISE Technologies Corporation
    Inventors: Hyoungjun Na, Yoshikazu Furuta, Shigeki Otsuka, Takasuke Ito, Tomohiro Nezuka
  • Patent number: 11881407
    Abstract: A method of manufacturing a chip formation wafer includes: forming an epitaxial film on a first main surface of a silicon carbide wafer to provide a processed wafer having one side adjacent to the epitaxial film and the other side; irradiating a laser beam into the processed wafer from the other side of the processed wafer so as to form an altered layer along a surface direction of the processed wafer; and separating the processed wafer with the altered layer as a boundary into a chip formation wafer having the one side of the processed wafer and a recycle wafer having the other side of the processed wafer. The processed wafer has a beveling portion at an outer edge portion of the processed wafer, and an area of the other side is larger than an area of the one side in the beveling portion.
    Type: Grant
    Filed: August 31, 2021
    Date of Patent: January 23, 2024
    Assignees: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA, MIRISE Technologies Corporation, DISCO Corporation
    Inventors: Masatake Nagaya, Teruaki Kumazawa, Yuji Nagumo, Kazuya Hirata, Asahi Nomoto
  • Patent number: 11877883
    Abstract: A biological sound detection device includes a housing, a medium, a transducer unit, a detection unit, and a pressure adjusting unit. The medium has an acoustic impedance closer to water than air. The transducer unit is arranged in the housing, and converts a biological sound transmitted through the medium into an electric signal. The detection unit provides, together with the housing, an accommodation region that accommodates the medium, detects the biological sound, transmits the biological sound to the medium, and is deformable in a direction approaching the transducer unit according to a load of a physical body. The pressure adjusting unit adjusts a pressure of the medium so as to suppress an increase in the pressure of the medium due to deformation of the detection unit.
    Type: Grant
    Filed: August 2, 2022
    Date of Patent: January 23, 2024
    Assignees: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA, MIRISE Technologies Corporation
    Inventors: Fan Cheng, Yuki Anno, Yoshinori Tsuchiya
  • Patent number: 11870425
    Abstract: A change rate control circuit computes a first drive speed, which is a gate drive speed of a gate of a drive-subject element, for controlling a change rate of an element voltage of the drive-subject element at a target change rate during a change period. A timing generating circuit acquires, in advance, a delay time caused when the gate is driven and determines a switching timing, at which the element voltage reaches a switching threshold voltage which is lower than a desired switching voltage by a predetermined value, during turn-off of the drive-subject element and generates a timing signal representing the switching timing. A speed change circuit changes the gate drive speed from the first drive speed to a second drive speed at the switching timing during turn-off of the drive-subject element.
    Type: Grant
    Filed: July 8, 2022
    Date of Patent: January 9, 2024
    Assignees: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA, MIRISE Technologies Corporation
    Inventor: Hironori Akiyama
  • Patent number: 11862477
    Abstract: A method for manufacturing a semiconductor device having a gallium oxide-based semiconductor layer includes: ion-implanting dopant into a gallium oxide-based semiconductor layer while heating the gallium oxide-based semiconductor layer; and annealing the gallium oxide-based semiconductor layer under an oxygen atmosphere, after the ion-implanting.
    Type: Grant
    Filed: December 15, 2021
    Date of Patent: January 2, 2024
    Assignees: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA, MIRISE Technologies Corporation
    Inventors: Shuhei Ichikawa, Hiroki Miyake
  • Patent number: 11855618
    Abstract: A gate drive device drives a gate of a semiconductor switching element and controls a transient voltage corresponding to a voltage of a main terminal of the semiconductor switching element to a target value of the transient voltage at a time of switching the semiconductor switching element. The gate drive device includes a calculation circuit, a drive circuit, a detection circuit, and a learning circuit. The calculation circuit executes a predetermined calculation mode to calculate an operation amount for operating gate drive speed of the semiconductor switching element. The drive circuit drives the gate of the semiconductor switching element according to the operation amount. The detection circuit detects the transient voltage. The learning circuit executes learning processing to change the predetermined calculation mode based on the operation amount calculated by the calculation circuit and the transient voltage detected by the detection circuit.
    Type: Grant
    Filed: September 27, 2022
    Date of Patent: December 26, 2023
    Assignees: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA, MIRISE Technologies Corporation
    Inventors: Hironori Akiyama, Akimasa Niwa
  • Patent number: 11846656
    Abstract: A current sensor for detecting a current based on a terminal voltage and a resistance value of a shunt resistor, includes: a resistance value correction circuit having: correction resistors; a signal application unit; a voltage detection unit that detects terminal voltages of the shunt resistor and a part of the correction resistors in a first period, and terminal voltages of all of the correction resistors in a second period; and a correction unit that corrects the resistance value for current detection based on a calculated resistance value of the shunt resistor. Resistance values and resistance accuracies of the correction resistors are higher as the plurality of correction resistors are disposed farther from the shunt resistor.
    Type: Grant
    Filed: June 7, 2022
    Date of Patent: December 19, 2023
    Assignees: DENSO CORPORATION, TOYOTA IDOSHA KABUSHIKI KAISHA, MIRISE Technologies Corporation
    Inventors: Tomohiro Nezuka, Yoshikazu Furuta, Shotaro Wada
  • Patent number: 11848677
    Abstract: A clock signal generation circuit for a switched capacitor circuit with a chopping function unit includes: first and second synchronous clock circuits that generate first and second synchronous clock signals, respectively; an edge signal generation circuit that generates one or more rise and fall edge signals by delaying the first synchronous clock signal; a first clock generator that generate a first clock signal group for driving the switched capacitor circuit; and a second clock generator that generates a second clock signal group for driving the chopping function unit. Frequencies of the first and second clock signal groups are respectively defined by the first and second synchronous clock circuits. Rise and fall edges of the first and second clock signal groups are defined by the edge signal generation circuit.
    Type: Grant
    Filed: August 10, 2022
    Date of Patent: December 19, 2023
    Assignees: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA, MIRISE Technologies Corporation
    Inventors: Shotaro Wada, Tomohiro Nezuka
  • Patent number: 11831471
    Abstract: A differential communication circuit is connected to a communication line formed of a positive communication line and a negative communication line for differential communication. The differential communication circuit includes: a series circuit that includes a resistor element and a connection switch. The resistor element is connected between the positive and negative communication lines when the connection switch is turned on. The circuit also includes a transmission unit that is configured to output a differential signal to the communication line and a controller that is configured to change impedance of the communication line by turning on the connection switch in a period during which the transmission unit does not output the differential signal.
    Type: Grant
    Filed: June 15, 2022
    Date of Patent: November 28, 2023
    Assignees: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA, MIRISE Technologies Corporation
    Inventors: Shigeki Otsuka, Hyoungjun Na, Takasuke Ito, Yoshikazu Furuta, Tomohiro Nezuka
  • Patent number: 11825267
    Abstract: A microphone has a MEMS device, a driver, and a control unit. The MEMS device outputs a first electrical signal according to an acoustic pressure. The driver vibrates the MEMS device by a drive signal. The control unit calculates a correction value for correcting the first electric signal based on a second electric signal output from the MEMS device when the MEMS device is vibrated by the drive signal.
    Type: Grant
    Filed: January 25, 2022
    Date of Patent: November 21, 2023
    Assignees: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA, MIRISE Technologies Corporation
    Inventors: Tomoki Tanemura, Hideyuki Nagai
  • Patent number: 11825594
    Abstract: A semiconductor device includes: a substrate main body having a first surface and a second surface; an electric component arranged in the substrate main body; a surface conductor pattern arranged in a first circuit layer located on the second surface. Also included is a first internal conductor pattern and a second internal conductor pattern arranged in a second circuit layer located between the electric component and the second surface, and insulated from each other. Also, at least one first heat conductor via extends from the electric component to the first internal conductor pattern; and at least one second heat conductor via extends from the surface conductor pattern to the second internal conductor pattern.
    Type: Grant
    Filed: February 24, 2022
    Date of Patent: November 21, 2023
    Assignees: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA, MIRISE Technologies Corporation
    Inventor: Shohei Nagai
  • Patent number: 11815531
    Abstract: A current sensor of a detection target current using a shunt resistor includes: a resistance value correction circuit having: a correction resistor; a signal application unit that applies an alternating current signal to a series circuit of the shunt resistor and the correction resistor; a first voltage detection unit that detects the terminal voltage of the shunt resistor; a second voltage detection unit that detects a terminal voltage of the correction resistor; and a correction unit that calculates the resistance value of the shunt resistor based on a first voltage detection value by the first voltage detection unit and a second voltage detection value by the second voltage detection unit, and corrects the resistance value for current detection based on a calculated resistance value of the shunt resistor.
    Type: Grant
    Filed: July 28, 2022
    Date of Patent: November 14, 2023
    Assignees: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA, MIRISE Technologies Corporation
    Inventors: Tomohiro Nezuka, Yoshikazu Furuta, Shotaro Wada
  • Patent number: 11791156
    Abstract: A method for manufacturing a semiconductor device, includes: forming an alignment mark in a non-element region of a gallium-based compound semiconductor layer; and, after the forming of the alignment mark, forming an element structure in an element region of the gallium-based compound semiconductor layer. The forming of the alignment mark further includes: ion-implanting a metal into a part of a surface layer portion of the non-element region of the gallium-based compound semiconductor layer; and annealing the gallium-based compound semiconductor layer.
    Type: Grant
    Filed: February 2, 2022
    Date of Patent: October 17, 2023
    Assignees: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA, MIRISE Technologies Corporation
    Inventor: Tetsuya Yamada
  • Patent number: 11784223
    Abstract: A compound semiconductor layer in a semiconductor device includes a drift region of a first conductivity type, a JFET region of the first conductivity type disposed above the drift region, a body region of a second conductivity type disposed above the drift region and adjacent to the JFET region, and a JFET embedded region of the second conductivity type or i-type disposed in the JFET region. The JFET region has a bottom surface portion adjacent to the drift region, a side surface portion adjacent to the body region, and an inside portion adjacent to the JFET embedded region, and further has a high concentration portion at the bottom surface portion and the side surface portion. The high concentration portion has an impurity concentration higher than an impurity concentration of the inside portion.
    Type: Grant
    Filed: November 10, 2021
    Date of Patent: October 10, 2023
    Assignees: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA, MIRISE Technologies Corporation
    Inventor: Hirofumi Kida
  • Patent number: 11764546
    Abstract: The semiconductor laser device includes: an activation layer having at least one first quantum dot layer and at least one second quantum dot layer having a longer emission wavelength than the first quantum dot layer. The gain spectrum of the active layer has the maximum values at the first wavelength and the second wavelength longer than the first wavelength corresponding to the emission wavelength of the first quantum dot layer and the emission wavelength of the second quantum dot layer, respectively. The maximum value of the gain spectrum at the first wavelength is defined as the first maximum value, and the maximum value of the gain spectrum at the second wavelength is defined as the second maximum value. The first maximum value is larger than the second maximum value.
    Type: Grant
    Filed: October 14, 2021
    Date of Patent: September 19, 2023
    Assignees: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA, MIRISE Technologies Corporation, QD LASER, Inc.
    Inventors: Yuki Kamata, Hiroyuki Tarumi, Koichi Oyama, Keizo Takemasa, Kenichi Nishi, Yutaka Onishi
  • Patent number: 11757009
    Abstract: A semiconductor device includes: a first semiconductor layer having an N conductive type and made of a gallium oxide-based semiconductor; and a second semiconductor layer made of a gallium oxide-based semiconductor, in contact with the first semiconductor layer, and having the N conductive type with an electrically active donor concentration higher than an electrically active donor concentration of the first semiconductor layer. A difference between a donor concentration of the first semiconductor layer and a donor concentration of the second semiconductor layer is smaller than a difference between the electrically active donor concentration of the first semiconductor layer and the electrically active donor concentration of the second semiconductor layer.
    Type: Grant
    Filed: August 10, 2021
    Date of Patent: September 12, 2023
    Assignees: DENSO CORPORATION, MIRISE Technologies Corporation, TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Hiroki Miyake
  • Patent number: 11740087
    Abstract: A micro vibration body includes a curved surface portion, a recessed portion recessed from the curved surface portion, a bottom surface protruding portion protruding from a bottom surface of the recessed portion, and a through hole in the bottom surface protruding portion. A mounting substrate has a positioning recess, into which the bottom surface protruding portion is inserted, and electrode portions surrounding the inner frame portion. A joining member is in the positioning recess and joins the bottom surface protruding portion with the mounting substrate. The bottom surface is in contact with a region of the mounting substrate around the positioning recess. The bottom surface protruding portion has a tip end surface that is at a distance from the positioning recess. The joining member at least partially enters the through hole and is electrically connected to the conductive layer.
    Type: Grant
    Filed: March 24, 2022
    Date of Patent: August 29, 2023
    Assignees: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA, MIRISE Technologies Corporation
    Inventors: Shota Harada, Keitaro Ito, Katsuaki Goto, Yuuki Inagaki, Takahiko Yoshida, Yusuke Kawai, Teruhisa Akashi, Hirofumi Funabashi
  • Patent number: 11736830
    Abstract: A solid-state imaging element includes a pixel and an image processing unit. The pixel has a common transistor, a charge accumulation unit, and a power supply. The common transistor has a first terminal and a second terminal. The common transistor maintains a voltage of the first terminal at a predetermined voltage with a voltage applied from the power supply and outputs a voltage corresponding to a change in a voltage of the charge accumulation unit from the second terminal, based on a condition that an element voltage is a ground voltage. The common transistor outputs a voltage corresponding to a change in a voltage of the charge accumulation unit from the first terminal, based on the element voltage is higher than the ground voltage. The image processing unit generates a luminance image according to a change in the voltage output from the second terminal of the common transistor.
    Type: Grant
    Filed: September 28, 2022
    Date of Patent: August 22, 2023
    Assignees: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA, MIRISE Technologies Corporation
    Inventor: Hiroki Sasaki