Abstract: A data switching engine is provided. The data switching engine includes a switching processor used for data traffic forwarding and an traffic management processor used for data traffic management. The switching processor retains all functionality of currently deployed data switching equipment as it relates to data switching and forwarding. The traffic management processor performs data traffic characterization, statistics extraction, service level agreement enforcement, etc. The use of the traffic management processor reduces computational loads otherwise imposed on the switching processor while maintaining or surpassing levels of service provided by currently deployed data switching equipment.

Abstract: An amplifier circuit arrangement comprises first and second long-tailed pairs of transistors each including an inductor to provide a constant current source for their respective transistor pair. Each of the transistors of the pairs is provided with a bias current on its base electrode. A differential input signal is applied between the base electrode of one transistor, via a dc blocking capacitor and an input terminal, and the base electrode of another transistor, via a dc blocking capacitor and an another input terminal. The collector electrodes of two of the transistors are connected together and to an output terminal. The collector electrodes of the other two transistors similarly are connected together and to the other output terminal. A differential output signal is provided between the output terminals. This connection of the collectors of the transistors, which can be described as parallel connection, provides summation of the differential signals provided by the transistor pairs.

Abstract: An image reject mixer arrangement 1 comprises a transconductor 2, first and second mixer cores 3 and 4, first and second phase shifters 5 and 6 and a summer or combiner 7. The mixer arrangement 1 receives a single-ended RF voltage signal on a terminal 8, a differential local oscillator signal on I-LO terminals indicated at 9 and a 90° phase shifted differential local oscillator signal on Q-LO terminals 10, and provides differential IF output signals on output terminals 11. From the output of the transconductor 2 to the output of the combiner 7, the image reject mixer arrangement 1 carries signals in what can be described as a “current mode”, i.e. it is the current, not the voltage, which conveys the desired signal. In this current mode, it is advantageous to provide each active circuit block with a high output impedance and a low input impedance wherever possible.

Abstract: An oscillator comprising an oscillator body having a waveguide and a substantially cylindrical bore intersecting the waveguide, and a package comprising a heat sink having a substantially cylindrical portion and an oscillatory semiconductor device supported at one end of the heat sink. The diameter of the cylindrical portion of the heat sink in relation to the diameter of the bore is such that the heat sink is supported in the bore by one of an interference fit and a tight sliding fit, with the semiconductor device being located in the waveguide. The tight sliding fit or interference fit includes a layer of soft deformable material.

Abstract: A method of manufacturing integrated circuits is performed by coating a substrate with resist, exposing the resist to light through a pattern in a mask so as to define slots in the resist corresponding to the pattern in the mask, chemically developing the resist after exposure to light, and choosing the thickness of the resist so as to achieve the desired profile of the slots defined in the resist.

Abstract: In a multi-channel electrical communication system 1, a method of estimating the interference level in a test channel due to the intermodulation of two or more other channels, where each channel is centred upon a carrier frequency. The method comprises, for a given m-th order mode, an initial step of identifying the set(s) of carrier frequencies, the m-th order linear combination of which gives rise substantially to the carrier frequency of said test channel. This process is carried out by a computer 2. For the or each of the identified set of carrier frequencies, signal generators 3 are tuned to respective ones of the carrier frequencies. The generated signals are applied to an input of the communication system 1, and the intermodulation interference at the carrier frequency of the test channel is measured at an output of the system 1.

Abstract: It was proposed to combine two successful VCL technologies, wafer fusion and selective oxidation, in a new way to form a long wavelength VCL. The Al(Ga)As oxidation is performed via fusion channels before the actual wafer fusion step. By doing so, the structure combines the advantages of two different, successful long wavelength VCL structures; the double fused and the single fused, oxygen implanted VCL.

Abstract: An AC voltage amplifier arrangement comprising an input stage 1 having an input, an amplifier 3 connected in series shunt feedback mode, and an output, further comprises a variable gain amplification stage 2 having an input coupled to the output of said input stage 1, and an output. The amplifiers 3, 5 of the input and variable gain amplification stages 1, 2 are arranged to operate in current mode.

Abstract: An integrated circuit comprises an application-non-specific library cell, externally developed logic circuitry integrated with the library cell, and an up-integration module (UIM) connected to the library cell and to the logic circuitry and providing a two-way interface between the library cell and the logic circuitry and between the library cell and an external device. The logic developed for a prototype system comprising such a library cell in association with external logic circuitry can be integrated into the circuit without requiring any change in its function or in the program code developed for the prototype system.

Abstract: A system and method for detecting a low battery voltage supplied to a battery operated integrated circuit. A stable reference voltage provided by a bangap reference is compared with the battery voltage. A switched capacitor circuit is used instead of the more conventional resistor combination to supply a scaled representation of the battery voltage. Power requirements are reduced by combining the bandgap reference and the comparator into a single component.

Abstract: A number of npn and pnp bipolar transistors are formed in a single chip of silicon, so that some of the transistors have a greater frequency response than others The higher frequency transistors have their emitters located closer to the collectors, by positioning a collector, or emitter, of a transistor in a recessed portion of the surface of the chip. The recess is formed in an accurate and controlled manner by locally oxidising the silicon surface, and subsequently removing the oxide to leave the recess.

Abstract: A vertical cavity surface emitting laser (VCSEL) and monitoring diode combination having reduced parasitic capacitance for use in high bandwidth communications systems. The VCSEL has both p-type and n-type contacts on the same face. This allows the VCSEL to be mounted on a monitor chip or diode without using a metal contact layer. In an embodiment wherein the VCSEL is soldered to the monitor chip for mechanical stability only a small metal pad no larger than the VCSEL is used.

Abstract: A radio frequency amplifier comprises an input amplifier provided with a shunt feedback path for determining the input impedance. A first transconductance amplifier forms part of a series feedback arrangement with a resistor around the amplifier so as to boost the effective value of the resistor. An identical transconductance amplifier is connected to the output of the input amplifier and its output forms the output of the radio frequency amplifier.

Abstract: In a detection circuit for ASK or OOK modulation, the received modulated signal is ac coupled to a dc restoration circuit and amplified. The dc restoration is carried out on signal peaks corresponding to “mark” intervals of the modulated signal. Thus data may be recovered even in the presence of high levels inband continuous interfering signals.

Abstract: An optical module comprising an optoelectronic board having electrical connection sites for connection with an electrical circuit. The module includes a plurality of optoelectronic devices on the optoelectronic board and an optical fiber connector including a plurality of optical elements each for connection with a respective optoelectronic device. Cooperative alignment members on the optoelectronic board and the optical fiber connector are provided for aligning the optoelectronic devices on the board.

Abstract: An extender for an electrical data bus including a power line and signal lines has first and second electrical connectors for connection to respective electrical connectors attached to respective electrical data buses. The electrical connectors include a data interface circuit for communication with the electrical bus, an optical transmitter and optical receiver electrically connected to the data interface circuit, and driver circuits for the optical transmitter and optical receivers. The driver circuits obtain power from the power line on the local electrical data bus. An optic fiber is connected between the optical transmitters and receivers at respective first and second electrical connectors to transfer data optically between the first and second electrical connectors and thereby extend the range of the data bus.

Abstract: A vertical cavity surface emitting laser (VCSEL) and monitoring diode combination having reduced parasitic capacitance for use in high bandwidth communications systems. The VCSEL has both p-type and n-type contacts on the same face. This allows the VCSEL to be mounted on a monitor chip or diode without using a metal contact layer. In an embodiment wherein the VCSEL is soldered to the monitor chip for mechanical stability only a small metal pad no larger than the VCSEL is used.

Abstract: A 4-level direct conversion receiver demodulator 1 comprises an edge detector 2, a finite impulse response filter 3, an N-bit path 4, a data slicer 5 and automatic frequency control device 6. The edge detector 2 receives Limited I (LIMI) and Limited Q (LIMQ) signals on respective ones of first and second input leads 7 and 8 from a direct conversion receiver arrangement R. The edge detector 2 contains logic to provide an EDGE signal, comprising a short pulse when any edge is detected in either of the LIMI and LIMQ signals, on a line 9 and an I Lead Q (ILQ) signal, indicative of which of the LIMI and LIMQ signals has the leading phase, on a line 10 to the filter 3. The edge detector 2 thus determines both the frequency and the relative phase of the signals provided by the limited output direct conversion receiver R without the use of analogue to digital conversion circuitry. The N-bit path output 4 from the filter 3 is provided to both the data slicer 5 and to the AFC device 6.

Abstract: A top surface emitting vertical cavity laser with enhanced power handling capacity. The laser provides a patterned top electrode for uniformly injecting applied current to the active area. The diameter of the electrode relative to the vertical distance between it and the active layer is reduced by patterning. The result is an improved laser with significant power output.

Abstract: An optical emission device includes a semiconductor with conduction and valence bands and a plurality of quantum wells formed in the conduction and valence bands in a multiple quantum well active region such that recombination of holes and electrons between said quantum wells results in the emission of light. At least some of the quantum wells have different characteristic emission frequencies to broaden the gain spectrum of the emitted light.