Abstract: An air-conditioning apparatus includes a body casing of an indoor unit formed in a substantially rectangular parallelepiped shape. The body casing is formed with a body inlet port on a body bottom, and a body outlet port is formed in each body side. The body casing houses a centrifugal fan, a fan motor rotatably driving the centrifugal fan, and an indoor heat exchanger disposed so as to surround an outer periphery of the centrifugal fan in planar view. In each of the body outlet port, a joint is protrudingly provided with a body-side duct connecting portion that connects a duct thereto. Further, outlet ports are formed. The air-conditioning apparatus includes a plurality of outlet units each protrudingly provided with an outlet-side duct connecting portion that connects the duct thereto. Furthermore, at least one of the joints is formed with a plurality of the body-side duct connecting portions.

Abstract: Systems and methods for low ambient air temperature cooling in air-source based heat pump systems wherein an outdoor heat pump unit includes a discharge hood positionable over its fan. The hood including a damper that is openable and closeable as a function of outside temperature. The outdoor unit may also include wind deflectors positioned over the coil openings of the disclosure. During cooling operations below 23° F., the damper assembly partially closes to reduce airflow across the condenser coil of the outdoor unit to a level below that which is possible at minimum fan speed. As the outdoor temperature continues to drop, the damper assembly continues to close to further reduce airflow.

Abstract: A receiving antenna system includes an antenna unit, a receiver unit, a down converter and a DC power/control supply. The antenna unit includes a parabolic reflector, a feed horn and an orthomode transducer, which are configured to capture, isolate, and output respective first and second polarized RF signals. The receiver unit is coupled to the antenna unit and is configured to amplify the respective RF signals and output a selected one of the respective amplified RF signals in response to a DC control signal. The down converter is coupled to the receiver unit via a transmission line and is configured to further amplify, down convert and output the selected amplified RF signal as an intermediate signal. The DC power/control supply is coupled to the receiver unit via the same transmission and is configured to produce a power/control signal that is transmitted over the same transmission line in which the selected amplified RF signal is transmitted, thereby providing power and control to the receiver unit.

Abstract: Methods for operating a frame buffer memory device are disclosed which provide for accelerated rendering of two-dimensional and three-dimensional images in a computer graphics system One disclosed operation is a method for compressing data to be transmitted from a controller to the memory device and then decompressing the data within the memory device once it has been transmitted and received.

Abstract: Methods for operating a graphics system which employs one or more frame buffer memory devices are disclosed which methods provide for accelerated rendering of two-dimensional and three-dimensional images in a computer graphics system One disclosed operation is a method for compressing data to be transmitted from a controller to the memory device and then decompressing the data within the memory device once it has been transmitted and received.

Abstract: A receiving antenna system includes an antenna unit, a receiver unit, a down converter and a DC power/control supply. The antenna unit includes a parabolic reflector, a feed horn and an orthomode transducer, which are configured to capture, isolate, and output respective first and second polarized RF signals. The receiver unit is coupled to the antenna unit and is configured to amplify the respective RF signals and output a selected one of the respective amplified RF signals in response to a DC control signals. The down converter is coupled to the receiver unit via a transmission line and is configured to further amplify, down convert and output the selected amplified RF signal as an intermediate signal. The DC power/control supply is coupled to the receiver unit via the same transmission and is configured to produce a power/control signal that is transmitted over the same transmission line in which the selected amplified RF signal is transmitted, thereby providing power and control to the receiver unit.

Abstract: A frame buffer memory is disclosed which provides accelerated rendering of two-dimensional and three-dimensional images in a computer graphics system. One embodiment of the disclosed memory comprises a memory array, a pixel buffer, a plurality of pixel arithmetic-logic units, an input data formatter, an output data formatter, a read data formatter, a write data formatter and an address and control input bus.

Abstract: A graphics processing system which employs one or more frame buffer memory devices is disclosed which system provides accelerated rendering of two-dimensional and three-dimensional images. One embodiment of the disclosed system comprises a rendering controller, an interface, a frame buffer memory, a rendering bus and an address and control bus.

Abstract: An antenna feed horn assembly includes a circular feed horn having an electrically conductive wall with an edge defining a circular aperture. The antenna feed horn assembly further includes a circular waveguide mounted to the base of the circular feed horn and including an endplate. An cylindrical rod extends from the center of the endplate towards the center of the feed horn aperture along a longitudinal axis of the antenna feed horn assembly to minimize undesired reflections produced by transitions between electrically conductive material and non-electrically conductive material or dielectric within the antenna feed horn assembly. An antenna feed horn assembly can also include a splash plate opposite the endplate, the center from which another cylindrical rod extends towards the center of the endplate along the longitudinal axis of the antenna feed horn assembly to further minimize undesired reflections.

Abstract: A column access system is provided with a column counter for producing a column address in response to an external address. The column address is latched in an address decoder which decodes the column address to select a column in the DRAM. A command decoder generates a column decode enable signal supplied to the address decoder to control latching of the column address, and a write enable signal, together with data, supplied to a write driver. A data latch is provided in the write driver for latching data until an equalize control signal is activated. The latched data signal drives global input/output pair to provide data writing to the DRAM.

Abstract: A sigma-delta analog-to-digital (A/D) converter has an analog modulator, and an adjustable reference voltage circuit that provides a reference voltage to the analog modulator along a feedback path during A/D conversion. The reference voltage circuit includes a reference voltage generator that provides a plurality of positive and negative polarity signals to a gain multiplexer. The gain multiplexer selectively supplies a pair of positive and negative polarity signals to the analog modulator based on a select signal produced by a gain register and a microprocessor interface bus that together allow adjustment of the range of operation and performance of the sigma-delta A/D converter. This adjustment is made based on a particular application in which the converter is implemented; as the relative input power of an input signal changes, the sigma-delta A/D converter as dynamically adjusted, realizes higher performance.

Abstract: A data communications protocol converter for interfacing manufacturing process equipment with a host computer comprises a controller that converts the messages transmitted by the host computer and equipment into messages that meet the protocol of the receiving side. A data acquisition system coupled between the controller and equipment provides a parallel interface to the process equipment and allows the converter to check for/activate logic signals from/to the process equipment. A user interface circuit provides the controller with a user friendly interface that enables the user to set any message parameters and conversation scheme and to interactively communicate with each attached device and edit and re-transmit previously send messages. A software support workstation coupled to the controller through a network provides capability for remote target machine access, software maintenance and configuration modification via the network.