Abstract: A memory having a SRAM, a DRAM, and two independent and functionally identical IO ports. Each port may be used as a read-only, a write-only, or a read-write port. One port may perform a read access to the SRAM, whereas the other port may carry out a write access to the SRAM in the same clock cycle. Each and every location of the SRAM may be accessed from any of the ports. Each port comprises a two-stage pipelined data path for providing a read or write access to the SRAM. Stage 1 decodes control and write enable signals, latches address signals and performs the output of read data. Stage 2 supports accesses to SRAM cells for writing and reading data. In a unified-port mode of operation, two 16-bit ports may be combined to produce a single port supporting a 32-bit write or read access to the SRAM. In a data burst mode of operation, each port may be programmed to select individual length of data bursts and individual burst type.

Abstract: A multi-port RAM (MPRAM) having a SRAM and a DRAM on a single chip. Separate pins are provided on the chip to supply independent chip select signals for the SRAM and the DRAM. When the SRAM chip select signal is at a high level, a clock generator is prevented from producing an internal clock signal for the SRAM. As a result, no SRAM operation is performed in response to a SRAM command. Similarly, when the DRAM chip select signal is high, a clock generator produces no internal clock signal for the DRAM. As a result, DRAM operations are prevented from being performed in response to DRAM commands.

Abstract: An electrically grounded semiconductor structure is embedded in a non-conductive packaging material, without employing any electrical leads of the semiconductor structure as an electrical path and without damaging the semiconductor structure. The desired grounding connection is obtained by physically removing a portion of the non-conductive packaging material from a rear portion of the semiconductor structure, replacing the removed non-conductive material by a conformable electrically conductive material, and then electrically contacting this conformable electrically conductive material to a grounding element. In another aspect of the invention, a portion of the non-conductive packaging material is removed from a rear portion of the semiconductor structure and a metallic element such as a pin or a spring is disposed to make contact between the exposed portion of the semiconductor structure and the grounding element.

Abstract: A receiving antenna includes a parabolic reflector and a feed horn. The feed horn includes an electrically conductive wall with an edge forming an aperture. The feed horn further includes a plurality of electrical conductors that extend from the edge to the center of the feed horn in a substantially coplanar relationship with the aperture. Each of the electrical conductors differentially affect a first polarized electrical field perpendicular to the edge adjacent the electrical conductor and a second polarized electrical field parallel to the edge adjacent the electrical conductor. In this manner, the electrical conductors can be configured to reduce the effective aperture of the feed horn in a plane, so that a first polarized horn radiation pattern produced by the feed horn can be circularized.

Abstract: An omnidirectional remote control for use with electrically controllable devices. The remote control comprises a keypad input and a program selector for determining control signals to be transmitted by circuitry within the remote control. The remote control further comprises control circuitry which may be used to drive a plurality of transmitting diodes that are spaced around the perimeter of the remote control. The transmitting diodes are spaced so as to provide essentially omnidirectional transmission of control signals.

Abstract: A static video telephone for sending an image captured by an image capture-system and receiving a video signal transmitted over a telephone line. A video signal formed for transmission has a frame format including a phase shift correction data signal in addition to a frame synchronization signal, an amplitude calibration signal, an ID (information data) signal, and image data signal. The video telephone includes a frequency shift correction data generating circuit which is activated when frequency shifts are detected in the received signal and produces frequency-shift correction data. The frequency-shift correction data is then delivered to a subsequent demodulation timing generating circuit which scales phase errors in the received signal to produce phase error correction data. Both frequency-shift correction data and phase error correction data are combined together to produce a demodulation timing signal. With this signal, the received signal is demodulated.

Abstract: An air control damper assembly for mounting in an air duct comprising a damper blade pivotally mounted within the air duct and means for rotating the damper blade from an open position to a close position. A drive system rotates the damper blade such that the system exerts a high torque and low speed at the beginning and end of the rotation of the blade from one position to the other and a low torque and high speed in the middle of the rotation of the blade between positions. The damper blade is locked in the open and close positions by means of a motor and gear unit. Electrical switches interfacing with a drive disk in the drive system partially controls the energization of the motor.

Abstract: An improved video phone which transmits a source image over a standard telephone line in conjunction with audio voice signals is disclosed. The unique initialization protocol allows asynchronous transmission with its short format. The protocol format provides for a hardware preamble for synchronizing a receiver clock, a software preamble for identifying the video image and disabling the audio, automatic gain control adjustment data and amplitude calibration data. The audio portion is disabled by coupling a capacitor across the telephone to effectively short the telephone. The telephone is placed across the bridge circuit which is provided with switches to balance the bridge in both the telephone audio and the video modes. The transmitted as well as the received signal are passed through the same delay equalization circuit, so that half the delay equalization is done before transmission, with the remaining half being done after reception.