Abstract: A host computer add on encryption/decryption printed circuit board includes address and control buffers, data buffer and board decode logic having input and output terminals selectively connected to the host computer and to first ports of a dual port random access memory (DPR) for storing a block of data and addresses and inputting portions of the block of data and addresses into the DPR's memory. A central processing unit (CPU) is connected to second ports of the DPR, and to a CPU RAM, CPU ROM, real time clock, key image buffer, and DES encryption device.