Patents Assigned to Modus Test, LLC
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Patent number: 11674996Abstract: A testing system for test sockets is presented having a removable device under test printed circuit board (DUT PCB) that electrically connects with the electrical testing components of the system. A top stiffener is attached to the lower surface of the DUT PCB and is locked in place by engagement members of a locking mechanism, that is operated by an actuating mechanism, that includes a rack and pinion arrangement that converts rotational movement of the pinions to lateral movement of the racks thereby locking the stiffener connected to the DUT PCB to the socket plate so as to facilitate testing. The upper surface of the DUT PCB has an infinite top plane that is uninterrupted and can be of any size and shape. The system is also modular and can be formed of any number of modules depending on the pin count density required.Type: GrantFiled: June 8, 2022Date of Patent: June 13, 2023Assignee: Modus Test, LLCInventors: Lynwood Adams, Jack Lewis, Njteh Keleshian
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Patent number: 11668731Abstract: A testing system for electrical interconnects having a removable device under test printed circuit board (DUT PCB) that electrically connects with the electrical testing components of the system. A removable top plate is placed on top of the DUT PCB and is locked in place by a plurality of locking posts that selectively connect to cam surfaces in the top plate that pull the top plate down sandwiching the DUT PCB between the top plate and the electrical testing components of the system. An actuator is also presented that presses the device under test into the electrical interconnect at increments where tests are performed on one, some or all of the contact points of the electrical interconnect. This information is then analyzed and graphed to assist with determine the optimum force and/or height to use during actual use.Type: GrantFiled: April 4, 2022Date of Patent: June 6, 2023Assignee: Modus Test, LLCInventors: Lynwood Adams, Jack Lewis
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Patent number: 11385277Abstract: A testing system for test sockets is presented having a removable device under test printed circuit board (DUT PCB) that electrically connects with the electrical testing components of the system. A top stiffener is attached to the lower surface of the DUT PCB and is locked in place by engagement members of a locking mechanism, that is operated by an actuating mechanism, that includes a rack and pinion arrangement that converts rotational movement of the pinions to lateral movement of the racks thereby locking the stiffener connected to the DUT PCB to the socket plate so as to facilitate testing. The upper surface of the DUT PCB has an infinite top plane that is uninterrupted and can be of any size and shape. The system is also modular and can be formed of any number of modules depending on the pin count density required.Type: GrantFiled: August 3, 2020Date of Patent: July 12, 2022Assignee: MODUS TEST, LLCInventors: Lynwood Adams, Jack Lewis, Njteh Keleshian
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Patent number: 11313880Abstract: A testing system for electrical interconnects having a removable device under test printed circuit board (DUT PCB) that electrically connects with the electrical testing components of the system. A removable top plate is placed on top of the DUT PCB and is locked in place by a plurality of locking posts that selectively connect to cam surfaces in the top plate that pull the top plate down sandwiching the DUT PCB between the top plate and the electrical testing components of the system. An actuator is also presented that presses the device under test into the electrical interconnect at increments where tests are performed on one, some or all of the contact points of the electrical interconnect. This information is then analyzed and graphed to assist with determine the optimum force and/or height to use during actual use.Type: GrantFiled: May 26, 2020Date of Patent: April 26, 2022Assignee: MODUS TEST, LLCInventors: Lynwood Adams, Jack Lewis
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Patent number: 10788531Abstract: An improved package device simulator for the testing of testing sockets, the package device simulator being formed of a first layer of non-conductive rigid substrate with a second layer formed of a plurality of electrically conductive traces being added thereto. A third layer of non-conductive rigid substrate is adhered to the first layer with the second layer being sealed there between. The third layer having a plurality of openings therein, wherein the openings align with and expose a portion of the electrically conductive traces of the second layer. Conductive binding material and contact balls are added to the openings and the chip is cured thereby fusing the contact balls with the exposed portions of the traces. Next, the exposed surfaces are coated with a hardening conductive material, such as layers of Nickel and/or Gold. In this way an improved package device simulator is formed that is durable, easier to manufacture and less expensive than a solid metallic package device simulator.Type: GrantFiled: October 29, 2015Date of Patent: September 29, 2020Assignee: MODUS TEST, LLCInventors: Lynwood Adams, Bruce Rogers, Jack Lewis, Tim Conner, Jay Williams, Mike Young, Dawn Ritz
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Patent number: 10705120Abstract: A testing system for electrical interconnects having a removable device under test printed circuit board (DUT PCB) that electrically connects with the electrical testing components of the system. A removable top plate is placed on top of the DUT PCB and is locked in place by a plurality of locking posts that selectively connect to cam surfaces in the top plate that pull the top plate down sandwiching the DUT PCB between the top plate and the electrical testing components of the system. An actuator is also presented that presses the device under test into the electrical interconnect at increments where tests are performed on one, some or all of the contact points of the electrical interconnect. This information is then analyzed and graphed to assist with determine the optimum force and/or height to use during actual use.Type: GrantFiled: November 6, 2018Date of Patent: July 7, 2020Assignee: MODUS TEST, LLCInventors: Lynwood Adams, Jack Lewis
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Patent number: 10534017Abstract: A testing system for semiconductor chips having a removable device under test printed circuit board (DUT PCB) that electrically connects with the electrical testing components of the system. A removable top plate is placed on top of the DUT PCB and is locked in place by a plurality of locking posts that selectively connect to cam surfaces in the top plate that pull the top plate down sandwiching the DUT PCB between the top plate and the electrical testing components of the system. The DUT PCB is quickly and easily removed and replaced by moving the locking posts between an engaged position and a disengaged position. In this way, a single testing system can be used to test a great variety of semiconductor chips thereby reducing capital equipment costs and space needed in cleanrooms.Type: GrantFiled: December 22, 2017Date of Patent: January 14, 2020Assignee: MODUS TEST, LLCInventors: Lynwood Adams, Jack Lewis
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Patent number: 10156586Abstract: A testing system for electrical interconnects having a removable device under test printed circuit board (DUT PCB) that electrically connects with the electrical testing components of the system. A removable top plate is placed on top of the DUT PCB and is locked in place by a plurality of locking posts that selectively connect to cam surfaces in the top plate that pull the top plate down sandwiching the DUT PCB between the top plate and the electrical testing components of the system. An actuator is also presented that presses the device under test into the electrical interconnect at increments where tests are performed on one, some or all of the contact points of the electrical interconnect. This information is then analyzed and graphed to assist with determine the optimum force and/or height to use during actual use.Type: GrantFiled: March 17, 2017Date of Patent: December 18, 2018Assignee: Modus Test, LLCInventors: Lynwood Adams, Jack Lewis
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Patent number: D893433Type: GrantFiled: March 15, 2019Date of Patent: August 18, 2020Assignee: MODUS TEST, LLCInventors: Lynwood Adams, Jack Lewis
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Patent number: D927429Type: GrantFiled: March 15, 2019Date of Patent: August 10, 2021Assignee: MODUS TEST, LLCInventors: Lynwood Adams, Jack Lewis
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Patent number: D933016Type: GrantFiled: March 15, 2019Date of Patent: October 12, 2021Assignee: MODUS TEST, LLCInventors: Lynwood Adams, Jack Lewis