Patents Assigned to Monolithic Power System, Inc.
  • Method for fabricating LDMOS with self-aligned body
    Patent number: 10090409
    Abstract: A method for fabricating a LDMOS device, including: forming a semiconductor substrate; forming a dielectric layer atop the semiconductor substrate and an electric conducting layer on the dielectric layer; forming a first photoresist layer on the electric conducting layer; patterning the first photoresist layer through a first mask to form a first opening; etching the electric conducting layer through the first opening; implanting dopants of a first doping type into the semiconductor substrate through the first opening to form a first body region adjacent to the surface of the semiconductor substrate, and a second body region located beneath the first body region; removing the first photoresist layer; etching the electric conducting layer using a second photoresist layer and a second mask.
    Type: Grant
    Filed: September 28, 2016
    Date of Patent: October 2, 2018
    Assignee: Monolithic Power Systems, Inc.
    Inventors: Joel M. McGregor, Deming Xiao, Zeqiang Yao, Ji-Hyoung Yoo, Jeesung Jung
  • Semiconductor device reducing parasitic loop inductance of system
    Patent number: 10083930
    Abstract: A semiconductor device reducing parasitic loop inductance of system for the switching converter. The semiconductor device has an input voltage pin, a ground reference pin, a switching pin, and a semiconductor die, wherein the semiconductor die comprises a high-side power switch and a low-side power switch and a metal connection. The metal connection directly connects the high-side power switch and the first terminal of the low-side power switch, and is along and proximity to an edge of the semiconductor device to which the input voltage pin is distributed.
    Type: Grant
    Filed: January 20, 2017
    Date of Patent: September 25, 2018
    Assignee: Monolithic Power Systems, Inc.
    Inventors: Huaifeng Wang, Eric Braun, Hunt Hang Jiang, Francis Yu
  • High voltage current source with short circuit protection
    Patent number: 10079542
    Abstract: A current source generating a charging current and a supply voltage by charging a capacitor with the charging current. The current source has a conversion circuit converting a line voltage into a second voltage, a current generation circuit generating the charging current based on the second voltage, and a control circuit controlling the current generation circuit based on the supply voltage. The charging current is controlled to be at a first current value when the supply voltage is lower than a first threshold voltage, the charging current is controlled to be at a second current value when the supply voltage is higher than a second threshold voltage. The first threshold voltage is lower than the second threshold voltage, and the first current value is lower than the second current value.
    Type: Grant
    Filed: November 24, 2015
    Date of Patent: September 18, 2018
    Assignee: Monolithic Power Systems, Inc.
    Inventors: Bin Xiao, Yuedong Chen
  • VID-controlled voltage regulator with audible noise correction
    Patent number: 10003255
    Abstract: A method for correcting audible noise from a voltage regulator due to a change of a VID indicated by a series of VID commands. A VID difference between a current value and a target value of the VID is compared with a VID threshold when a VID command for changing the VID from the current value to the target value is received. The VID is held at the current value if the VID difference is larger than the VID threshold. And the VID command is executed if a holding duration for holding the VID at the current value expires and no new VID command for changing the VID is received before the expiration of the holding duration.
    Type: Grant
    Filed: December 19, 2016
    Date of Patent: June 19, 2018
    Assignee: Monolithic Power Systems, Inc.
    Inventors: Jeffrey Jull, Qian Li
  • Clock circuit and control method thereof
    Patent number: 9998127
    Abstract: A clock circuit and control method thereof to avoid missing the clock signal generated by the clock circuit when the generated clock signal is synced with an external clock signal, wherein the clock circuit comprises a current compensation circuit and a current control circuit. The clock signal is generated by alternately charging and discharging a capacitor with a charging current based on a sync current and a compensating current when an external clock signal is detected. The compensating current is generated based on a frequency of the external clock signal, and the sync current is provided based on a phase difference between the generated clock signal by the clock circuit and the external clock signal.
    Type: Grant
    Filed: March 20, 2017
    Date of Patent: June 12, 2018
    Assignee: Monolithic Power Systems, Inc.
    Inventor: Lei Li
  • Single inductor dual output voltage converter and the method thereof
    Patent number: 9998005
    Abstract: A voltage converter provides a positive voltage and a negative voltage with a single inductor. The voltage converter has a first switch, a second switch, a third switch and a fourth switch switched periodically, wherein each switching period comprise a first time period, a second time period and a third time period, and wherein: during the first time period, the first switch and the fourth switch are turned on, whereas the second switch and the third switch are turned off; during the second time period, the first switch and the third switch are turned on, whereas the second switch and the fourth switch are turned off; and during the third time period, the second switch and the fourth switch are turned on, whereas the first switch and the third switch are turned off.
    Type: Grant
    Filed: March 30, 2017
    Date of Patent: June 12, 2018
    Assignee: Monolithic Power Systems, Inc.
    Inventors: Bairen Liu, Licheng Sheng, Bo Yu
  • Switch mode power supply supporting both a bi-directional converter of a first configuration and that of a second configuration
    Patent number: 9998009
    Abstract: A switch mode power supply (SMPS) with control scheme selection for high-voltage configuration and low-voltage configuration of the SMPS. The SMPS operates in at least a charge state or a release state. The SMPS has a mode control module receiving a mode setting signal indicative of the configuration of the SMPS and a state indication signal indicative of the state of the SMPS. The SMPS selects a boost control module or a buck control module to control the SMPS according to the mode setting signal and the state indication signal.
    Type: Grant
    Filed: February 6, 2017
    Date of Patent: June 12, 2018
    Assignee: Monolithic Power Systems, Inc.
    Inventors: Pengjie Lai, Jian Jiang
  • Buck-boost converter, the control circuit and the method thereof
    Patent number: 9966851
    Abstract: A buck-boost converter automatically chooses work mode between buck mode, boost mode and buck-boost mode, in response to an input voltage and an output voltage. The buck-boost converter is with simple structure, convenient mode transition and lower output voltage ripple.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: May 8, 2018
    Assignee: Monolithic Power Systems, Inc.
    Inventor: Qian Ouyang
  • Magnetic angular sensing system with side-shaft mounted sensor and the method thereof
    Patent number: 9945691
    Abstract: A magnetic angular sensing system has a magnet magnetized radially and a magnetic angular sensor for sensing the angular position of the magnet. The magnetic angular sensor is mounted in parallel to the axis of the magnet and is non-coplanar with the magnet. The magnetic angular sensor senses an angular position of the magnet based on a detected axial magnetic field component and a tangential magnetic field component of the magnetic field vector where the sensor mounted. This invention provides a flexible sensing system.
    Type: Grant
    Filed: September 15, 2016
    Date of Patent: April 17, 2018
    Assignee: Monolithic Power Systems, Inc.
    Inventor: Serge Reymond
  • Method for fabricating LDMOS with reduced source region
    Patent number: 9941171
    Abstract: A method for fabricating a semiconductor device including: forming a block layer above a well region of a first doping type in a semiconductor substrate, wherein the block layer has an opening for defining a first region in an upper part of the well region and has sidewalls at sides of the opening; implanting dopants of a second doping type into the well region through the opening of the block layer to form the first region; implanting dopants of the first doping type into the first region in the manner of large-angle-tilt dopants implantation to form a second region for a first transistor, and to form a third region for a second transistor; and forming, for both of the first transistor and the second transistor, a fourth region between the second region and the third region.
    Type: Grant
    Filed: November 18, 2016
    Date of Patent: April 10, 2018
    Assignee: Monolithic Power Systems, Inc.
    Inventors: Ji-Hyoung Yoo, Joel M. McGregor, Eric K. Braun
  • AC switch circuit and associated control method
    Patent number: 9935630
    Abstract: An AC switch circuit coupled between an AC input signal and an AC load has a first switch, a second switch, a driving circuit, and a power generation circuit. The first switch blocks a first half-cycle of the AC input signal when turned OFF, and the second switch blocks a second half-cycle of the AC input signal when turned OFF. The driving circuit provides a driving signal to control the first switch and the second switch based on an enable signal. The power generation circuit provides a voltage signal to power the driving circuit. The power generation circuit stores energy from the AC input signal when the first switch and the second switch are turned OFF, and the power generation circuit is disconnected from the AC input signal when the first switch and the second switch are turned ON.
    Type: Grant
    Filed: September 18, 2015
    Date of Patent: April 3, 2018
    Assignee: Monolithic Power Systems, Inc.
    Inventors: Jian Jiang, Pengjie Lai, Bo Zhou, Junyong Gong, Eric Yang
  • Method for fabricating LDMOS using CMP technology
    Patent number: 9935176
    Abstract: A method for fabricating a LDMOS device in a well region of a semiconductor substrate, including: etching a polysilicon layer above the well region through a window for a body region; and forming spacers at side walls of the polysilicon layer, to define positions of source regions in the well region.
    Type: Grant
    Filed: November 18, 2016
    Date of Patent: April 3, 2018
    Assignee: Monolithic Power Systems, Inc.
    Inventors: Ji-Hyoung Yoo, Zeqiang Yao, Deming Xiao
  • Highly scalable multiphase power supply with constant on-time DC-DC converters
    Patent number: 9912240
    Abstract: A multiphase power supply includes several constant ON-time (COT) DC-DC converter integrated circuits (ICs). One of the COT DC-DC converter ICs generates a synchronization signal, which is received in parallel by the other COT DC-DC converter ICs. Two or more COT DC-DC converter ICs are turned ON at the same time in synchronization with the synchronization signal (e.g., an edge of a pulse of the synchronization signal) that is received in parallel and with another synchronization signal that is propagated from one COT DC-DC converter IC to another.
    Type: Grant
    Filed: October 7, 2016
    Date of Patent: March 6, 2018
    Assignee: Monolithic Power Systems, Inc.
    Inventors: James Nguyen, Jinghai Zhou
  • Lateral DMOS and the method for forming thereof
    Patent number: 9893146
    Abstract: A lateral DMOS device with peak electric field moved below a top surface of the device along a body-drain junction is introduced. The LDMOS has a deep body and a drift region formed by a series of P-type and N-type implants, respectively. The implant doses and depths are tuned so that the highest concentration gradient of the body-drift junction is formed below the surface, which suppresses the injection and trapping of hot holes in the device drain-gate oxide region vicinity, and the associated device performance changes, during operation in breakdown.
    Type: Grant
    Filed: October 4, 2016
    Date of Patent: February 13, 2018
    Assignee: Monolithic Power Systems, Inc.
    Inventors: Eric Braun, Joel McGregor, Jeesung Jung, Ji-Hyoung Yoo
  • Manufacturing method of selectively etched DMOS body pickup
    Patent number: 9893170
    Abstract: A method for fabricating a LDMOS device in a well region of a semiconductor substrate, including: forming a body region and a source layer in the well region through a window of a polysilicon layer above the well region, wherein the body region has a deeper junction depth than the source layer; forming spacers at side walls of the polysilicon layer; and etching through the source layer through a window shaped by the spacers, wherein the source layer under the spacers is protected from etching, and is defined as source regions of the LDMOS device.
    Type: Grant
    Filed: November 18, 2016
    Date of Patent: February 13, 2018
    Assignee: Monolithic Power Systems, Inc.
    Inventors: Ji-Hyoung Yoo, Jeesung Jung, Joel M. McGregor
  • ESD protection circuit with false triggering prevention
    Patent number: 9893518
    Abstract: An ESD protection circuit used to protect a protected circuit coupled between a first node and a second node against an ESD event. The ESD protection circuit has a discharging circuit and a control circuit. The discharging circuit selectively provides a current path for discharging a current from the first node to the second node. The control circuit controls the discharging circuit to switch on the current path during an ESD event. The control circuit further controls the discharging circuit to switch off the current path during the normal operation of the protected circuit.
    Type: Grant
    Filed: December 16, 2015
    Date of Patent: February 13, 2018
    Assignee: Monolithic Power Systems, Inc.
    Inventor: Eric Braun
  • Current sense circuit with adaptive common mode voltage adjust and associated method thereof
    Patent number: 9882482
    Abstract: A current sense circuit for sensing a target current flowing through a sensing resistor, has a first operational amplifier, a first transistor and a common mode adjust circuit. The first operational amplifier has a first input terminal coupled to a positive terminal of the sensing resistor, a second input terminal coupled to a negative terminal of the sensing resistor, and an output terminal. The first transistor has a first terminal coupled to the first input terminal of the first operational amplifier, a second terminal configured to provide a first output voltage in responsive to the target current, and a control terminal coupled to the output terminal of the first operational amplifier. The common mode adjust circuit adaptively adjusts a common mode voltage of the first operational amplifier.
    Type: Grant
    Filed: September 15, 2016
    Date of Patent: January 30, 2018
    Assignee: Monolithic Power Systems, Inc.
    Inventor: Ivor Hendry
  • Smart switch for connecting an input power supply to a load
    Patent number: 9871508
    Abstract: A monolithic integrated circuit (IC) switch device includes an input pin that receives an input power supply and an output pin that is connected to a load. The monolithic IC switch device includes driving circuitry that controls a switching operation of a power switch to connect and disconnect the input power supply to and from the load. A microcontroller can enable or disable the monolithic IC switch device based on indicator signals received by the microcontroller from the monolithic IC switch device.
    Type: Grant
    Filed: March 20, 2015
    Date of Patent: January 16, 2018
    Assignee: Monolithic Power Systems, Inc.
    Inventors: Ying Xiao, Rohan Samsi, Jinghai Zhou
  • Variable reference signal generator used with switching mode power supply and the method thereof
    Patent number: 9841779
    Abstract: A reference signal generator used with a switching mode power supply which converts an input voltage to an output voltage. The reference signal generator provides a reference signal consisting of a constant voltage signal and a variable voltage signal which is varying according to a duty cycle of the switching mode power supply during a startup period of the switching mode power supply and is varying according to a ratio of the input voltage at an end of the startup period to the input voltage of real time after the startup period.
    Type: Grant
    Filed: November 10, 2015
    Date of Patent: December 12, 2017
    Assignee: Monolithic Power Systems, Inc.
    Inventors: Yiwei Wang, Yike Li
  • Electronic device with substrate current management
    Patent number: 9837999
    Abstract: An electronic device with substrate current management. The electronic device has a semiconductor substrate in which a Schottky diode is formed. A parasitic PN diode is also formed in the semiconductor substrate, and coexisted with the Schottky diode in parallel. The forward voltage of the Schottky diode is limited to be larger than the forward conduction threshold voltage of the Schottky diode and to be smaller than the forward conduction threshold voltage of the parasitic PN diode.
    Type: Grant
    Filed: April 6, 2016
    Date of Patent: December 5, 2017
    Assignee: Monolithic Power Systems, Inc.
    Inventor: Kee Chee Tiew