Abstract: A voltage control circuit for a memory cell having a floating gate transistor and a capacitive device, comprising a first input terminal, a second input terminal, a first output terminal and a second input terminal, wherein the first input terminal is configured to receive a power supply voltage, the second input terminal is configured to receive a ground reference, and wherein based on the power supply voltage and the ground reference, the first output terminal and the second output terminal respectively provides a first voltage signal and a second voltage signal, and wherein a voltage value of the first voltage signal is twice the power supply voltage, and a maximum of a voltage difference between the first voltage signal and the second voltage signal is three times the power supply voltage.
Abstract: A switching circuit with a fault instruction circuit used in a voltage converter or a multi-phase voltage converter. The switching circuit has a pin, the pin is configured to receive a control signal during a normal operation, and the pin is also configured to output a fault instruction signal when one or more faults occur in the switching circuit. The instruction signal represents each of the one or more faults with a particular value.
Abstract: A control circuit for switching converter has an ON signal generating circuit, an OFF signal generating circuit, a first comparator, a second comparator and a logic circuit. The switching converter has a high switch and a low side switch connected in series. The ON signal generating circuit provides an ON signal based on a reference signal and a feedback signal. The OFF signal generating circuit provides an OFF signal. The first comparator provides a first comparing signal based on a comparing result between a first threshold and a current through the high side switch. The second comparator provides a second comparing signal based on a comparing result between a second threshold and a current through the low side switch. The logic circuit provides a first switching signal to control the high side switch ON and OFF and a second switching signal to control the low side switch ON and OFF.
Type:
Grant
Filed:
October 12, 2015
Date of Patent:
October 3, 2017
Assignee:
Chengdu Monolithic Power Systems Co., Ltd.
Abstract: A control circuit for switching converter has an ON signal generating circuit, a current sensing circuit, an OFF signal generating circuit, a logic circuit and an OFF threshold generating circuit. The ON signal generating circuit provides an ON signal based on a reference signal and a feedback signal. The current sensing circuit provides a current sensing signal based on a current flowing through a power switch of the converter. The OFF signal generating circuit provides an OFF signal based on an OFF threshold signal and the current sensing signal. The logic circuit provides a control signal based on the ON signal and the OFF signal. The OFF threshold generating circuit adjusts the OFF threshold signal based on the difference between a frequency of the switching signal and a preset frequency, so as to make the frequency of the switching signal substantially equal or larger than the preset frequency.
Type:
Grant
Filed:
July 1, 2015
Date of Patent:
September 26, 2017
Assignee:
Chengdu Monolithic Power Systems Co., Ltd.
Abstract: The present disclosure discloses a semiconductor device having conductive bumps formed on a conductive redistribution layer and associated method for manufacturing. The semiconductor device may further include a first type shallow trench formed on a passivation layer overlying a semiconductor substrate. The conductive redistribution layer is formed in the first type shallow trench. A polyimide layer may be formed between neighboring conductive redistribution layers should a plurality of the conductive redistribution layers are formed with or without the first type shallow trench formed for each of the plurality of conductive redistribution layers.
Abstract: An integrated circuit (IC) chip includes a copper structure with an intermetallic coating on the surface. The IC chip includes a substrate with an integrated circuit. A metal pad electrically connects to the integrated circuit. The copper structure electrically connects to the metal pad. A solder bump is disposed on the copper structure. The surface of the copper structure has a coating of intermetallic. The copper structure can be a redistribution layer and a copper pillar that is disposed on the redistribution layer.
Abstract: A current balance circuit for a power management device having a first current channel and a second current channel, having: a first current sense circuit configured to detect a current flowing through the first current channel, and to provide a first current sense signal indicative of the current flowing through the first current channel; wherein the current balance circuit draws current from the second current channel to the first current channel based on the first current sense signal.
Abstract: A control circuit for controlling a switching circuit has a ramp compensation circuit, a DC calibration circuit, a comparison circuit and a logic circuit. The ramp compensation circuit generates a ramp compensation signal. The DC calibration circuit generates a DC calibration signal by sampling and holding the ramp compensation signal. The comparison circuit generates a comparison signal according to the ramp compensation signal, a feedback signal representative of an output voltage of the switching converter, a reference signal and the DC calibration signal. The logic circuit generates a control signal to control the switching circuit according to an on-time signal and the comparison signal.
Type:
Grant
Filed:
February 25, 2015
Date of Patent:
July 25, 2017
Assignee:
CHENGDU MONOLITHIC POWER SYSTEMS CO., LTD.
Abstract: A power bank circuit controlling power switches to operate at different modes in accordance with different external coupling situations is discussed. The power bank circuit may be coupled to either a power source, a digital device, or a plurality of series coupled batteries at a high voltage port; and may be coupled to either a power source, a digital device, or a single battery at a low voltage port.
Type:
Grant
Filed:
January 9, 2015
Date of Patent:
July 18, 2017
Assignee:
Chengdu Monolithic Power Systems Co., Ltd.
Abstract: A computer provides a graphical user interface for displaying a virtual representation of a voltage regulator and for accepting a user requirement for the voltage regulator. The computer automatically determines an internal calibration setting of the voltage regulator that meets the user requirement. The computer simulates operation of the voltage regulator as calibrated with the internal calibration setting. The internal calibration setting is downloaded to the voltage regulator. A calibration controller of the voltage regulator receives the internal calibration setting and outputs digital calibration bits in accordance with the internal calibration setting. The digital calibration bits works in conjunction with interface circuits to adjust circuits of a voltage regulator core to digitally calibrate the voltage regulator.
Abstract: An electrical circuit includes a monolithic integrated circuit (IC) switch device that includes a first pin, a second pin, and a power switch that connects the first pin to the second pin through the power switch when the electrical circuit is turned ON. The monolithic IC switch device includes an adaptive safe operating area (SOA) circuit that limits allowable current through the power switch based on temperature, such as the temperature of the power switch.
Abstract: A switching controller having an over voltage protection circuit is disclosed. The over voltage protection circuit detects whether the output voltage is higher than an over voltage threshold and turns on the rectifier when the output voltage is higher than an over voltage threshold. The over voltage protection circuit detects whether a current flowing through a rectifier is lower than a negative current limit and further turns off the rectifier for a time period when the current flowing through the rectifier is lower than the negative current limit. The off time period varies inversely with the input voltage.
Abstract: A multiphase switching converter having a plurality of switching circuits and a control circuit, the plurality of switching circuits provide an output voltage, the control circuit provides a plurality of switching control signals to turn ON the plurality of switching circuits successively based on the output voltage and a reference signal, when the output voltage is detected overshooting, the control circuit turns OFF a current switching circuit, and when the output voltage is detected recovering from overshooting, the control circuit turns ON the current switching circuit again for a first time period until a sum of the first time period and a second time period achieves a predetermined value, wherein the second time period is a time period the current switching circuit maintains ON uninterruptedly before the output voltage is detected overshooting.
Type:
Grant
Filed:
March 24, 2015
Date of Patent:
May 23, 2017
Assignee:
Chengdu Monolithic Power Systems Co., Ltd.
Abstract: A COT switching converter includes a first switch, a second switch, an inductor, an on-time control circuit configured to generate an on-time control signal, a ramp compensation generator configured to generate a compensation signal, a comparing circuit, a logic circuit, a driving circuit and a feed forward circuit configured to generate a compensation control signal based on the input voltage of the switching circuit. The comparing circuit compares the sum of the compensation signal and a feedback signal with a reference signal to generate a comparison signal. Based on the on-time control signal and the comparison signal, the logic circuit generates a control signal with a duty cycle to drive the first and second switches through the driving circuit.
Type:
Grant
Filed:
April 20, 2015
Date of Patent:
May 16, 2017
Assignee:
Chengdu Monolithic Power Systems Co., Ltd.
Abstract: A reference compensating circuit used in a COT control circuit. The reference compensating circuit has an error amplifier, a first current sink, a resistor, a second current sink, a current source and a capacitor. The error amplifier amplifies the difference between a reference signal and a feedback signal and generates an error signal. Based on the error signal, the first current sink generates a current flowing out from a node of the reference compensating circuit. The resistor receives the reference signal at one terminal. The other terminal of the resistor is coupled to the node. The second current sink sinks a current from the node intermittently. The current source sources a current into the node. The capacitor is coupled between the node and a ground to provide a calibrated compensation reference signal to the COT control circuit.
Type:
Grant
Filed:
December 7, 2015
Date of Patent:
May 9, 2017
Assignee:
Chengdu Monolithic Power Systems Co., Ltd.
Abstract: A power converter having a clock module and a method for controlling a clock signal of the power converter. The clock module is configured to provide the clock signal and to set a clock frequency of the clock signal to a first predetermined frequency at the moment when the power converter is powered on. The clock module is further configured to regulate the clock frequency to increase from the first predetermined frequency to a second predetermined frequency through a predetermined times of step type frequency increase during a startup procedure of the power converter.
Type:
Grant
Filed:
February 24, 2015
Date of Patent:
May 2, 2017
Assignee:
Chengdu Monolithic Power Systems Co., Ltd.
Abstract: A switching mode power supply with resonant technology. The switching mode power supply current uses current polarity evaluation to avoid capacitive mode by triggering the capacitive protection if the evaluation indicates that the system will enter capacitive mode.
Type:
Grant
Filed:
September 18, 2015
Date of Patent:
April 25, 2017
Assignee:
Chengdu Monolithic Power Systems Co., Ltd.
Abstract: A multi-mode power converter and associated method for configuring and controlling a multi-mode power converter. The multi-mode power converter may have a boost operation mode and a buck operation mode. A first transistor is coupled between a switching terminal and a ground, and a second transistor and a third transistor are coupled in series between the switching terminal and an output port of the multi-mode power converter. In the buck mode, an on-resistance of the second transistor is regulated to ensure the multi-mode power converter to operate normally in the buck operation mode.
Type:
Grant
Filed:
November 20, 2015
Date of Patent:
April 25, 2017
Assignee:
Chengdu Monolithic Power Systems Co., Ltd.
Abstract: A PFC circuit having a switching circuit and a control circuit, the control circuit controls an operation mode of the switching circuit based on an input current and a switching frequency of the switching circuit, when the switching circuit works under a continuous current mode, the switching circuit is turned ON when the input current is less than an OFF current reference signal, and when the switching circuit works under a first discontinuous mode or a second discontinuous mode, the switching circuit is turned ON after a turn ON delay time period when the input current is less than the OFF current reference signal.
Type:
Grant
Filed:
April 21, 2015
Date of Patent:
April 11, 2017
Assignee:
CHENGDU MONOLITHIC POWER SYSTEMS CO., LTD.
Abstract: An isolator system has a transmitter configured to generate a first pair of buffered differential signals base based on an input signal; an isolation barrier having an input side coupled to the transmitter to receive the first pair of buffered differential signals, and an output side configured to provide a second pair of differential signals; and a receiver coupled to the output side of isolation barrier to receive the second pair of differential signals, wherein the receiver provides an output signal based on restoring the second pair of differential signals into a third pair of differential signals, wherein the output signal is converted from the third pair of differential signals and is a duplicate of the input signal with inherited propagation delays.