Abstract: A comparator circuit is provided that determines whether a given value is within a selected compare range. The comparator circuit electronically implements a Ling Adder algorithm to perform comparisons. The circuit operates at a high speed and requires fewer components compared to circuitry implementing a conventional carry look ahead algorithm. The circuit may be implemented in CMOS technology.

Abstract: An output buffer circuit is disclosed that has optimized ground bounce characteristics while maintaining low propagation delay. The output buffer may be incorporated within an integrated circuit and may be embodied in either inverting or non-inverting and in either enabling and non-enabling configurations. The output buffer circuit includes a feedback means coupled to the output terminal of the output buffer and to a pull-down transistor. The feedback means provides a feedback voltage to the gate of the pull-down transistor to regulate the derivative of source current with respect to time. The feedback means includes a pair of field effect transistors and either an inverter gate or a NOR gate coupled across one of the feedback field effect transistors.

Abstract: A resistor located above the semiconductive substrate of an integrated circuit chip can be made smaller than prior art resistors because no area is allocated for resistor contacts. During manufacture, a resistive strip having the width of the intended resistor is formed. A photoresist mask protects the top and sides of the resistive strip where the resistor is located, and etching exposes the ends but not the top and sides of the resistor. Contact to the resistor occurs at the upwardly extending (usually near vertical) end surfaces of the resistor.