Abstract: The present invention provides a wafer metrology pattern integrating both overlay and critical dimension features for SEM or AFM measurements. The present invention provides an improved test mask target which contains lines measuring 0.25 .mu.m, 0.3 .mu.m, and 0.5 .mu.m. The spaces between the lines can be adjusted accordingly. The improved test mask target provides a pattern that combines the wafer critical dimension and box-in-box overlay targets into a single structure. As a result, the pattern may be used for both overlay and critical dimension verifications in a single AMF or SEM measurement. More precisely, wafer overlay and critical dimension disposition may be made simultaneously, reducing the need to perform multiple measurements at each testing step.