Abstract: The present invention relates to an auxiliary tool for assembling a scrubber which includes a motor, a shaft rotatably coupled to and extending through the motor, a shaft pin detachably connected to the shaft, and a disk coupled to the shaft and having a notch located relative to the shaft pin at a predetermined angle with respect to a longitudinal axis of the shaft when properly assembled. In specific embodiments, the auxiliary tool comprises a tool body configured to at least partially receive the motor, the shaft pin, the disk, and the notch of the disk. The tool body includes a first recess configured to at least partially receive the shaft pin and a protrusion configured to be at least partially received into the notch of the disk. The first recess and the protrusion are arranged at the predetermined angle to position the notch of the disk and the shaft pin of the scrubber for proper assembly at the predetermined angle with respect to the longitudinal axis of the shaft.

Abstract: Embodiments of the present invention relate to a method for preventing gate oxide thinning in a recess LOCOS process. A method of forming a gate oxide on a substrate comprises providing a substrate having thereon a plurality of trenches having gate oxides formed therein, wherein the plurality of trenches are separated by a patterned pad oxide and a patterned silicon nitride layer disposed thereon and used to form the plurality of trenches. The patterned silicon nitride layer and the patterned pad oxide layer are removed to expose a surface of the substrate as an active area of the semiconductor device. An ion drive-in to the active area on the substrate is performed by directing a flow of oxygen and nitrogen toward the substrate at a predetermined temperature and with a sufficient amount of oxygen to at least substantially prevent silicon nitride from forming on the field oxide regions.

Abstract: The present invention relates to a method for determining rapidly and accurately the polishing time of a chemical mechanical polishing process for polishing target wafers to avoid any problems of under-polishing or over-polishing. An aspect of the present invention is directed to a method for determining a chemical mechanical polishing time for removing a target polishing thickness H from an uneven surface of a target wafer. The method comprises polishing a control wafer by a chemical mechanical polishing to obtain a progressive relationship of polishing thickness and respective polishing time therefor. A first polishing time T1 is determined for removing a first thickness H1 from the target wafer, in which the first thickness H1 with substantially the uneven surface removed is smaller than the target polishing thickness H of the target wafer to be removed.

Abstract: Embodiments of the present invention relate to processes utilized in the manufacturing of a semiconductor device having transistors to achieve high uniformity of threshold voltages. The invention does so by ensuring high uniformity of impurity concentration in the substrate. In one embodiment, a method for manufacturing a semiconductor device having transistors with high uniformity of threshold voltages comprises providing a substrate and a source of impurities, and disposing the substrate and the source of impurities in a first oxygen gas at a first initial temperature and heated to a first target temperature at a first temperature rate to drive the impurities into the substrate. The first initial temperature is sufficiently low to prevent the oxygen from diffusing into the substrate. The substrate is disposed in a second oxygen gas at a second initial temperature and heated to a second target temperature at a second rate to form an oxide layer on the substrate.

Abstract: Embodiments of the present invention relate to an apparatus for spin drying substrates in a spin dryer tank. A spin dryer cover is movable between a closed position to close an opening of the spin dryer tank and an open position to open the spin dryer tank, and a cylinder is coupled with the spin dryer cover. The cylinder is movable in a first operation to move the spin dryer cover to the open position and movable in a second operation to move the spin dryer cover to the closed position. A system for sensing the position of the spin dryer cover comprises a cylinder sensor configured to sense the first operation and the second operation of the cylinder. A cover sensor is configured to sense the position of the spin dryer cover. A logic circuit is configured to output a cover opening signal indicating that the spin dryer cover is in the open position when the cylinder sensor senses the first operation of the cylinder and the cover sensor senses that the spin dryer cover is in the open position.

Abstract: Embodiments of the present invention are directed to a metallization process for reducing the stress existing between the Al—Cu layer and the titanium nitride (TiN) layer, and solving the galvanic problem. The process does so by cooling the wafer in the vacuum apparatus where the metallization process is performed after formation of the Al—Cu layer and before the formation of the TiN layer. In accordance with an aspect of the present invention, a metallization process comprises placing a wafer in an Al—Cu sputtering chamber to form an Al—Cu layer on the wafer, and transferring the wafer to a titanium nitride sputtering chamber. An inert gas is introduced into the titanium nitride sputtering chamber to cool the wafer. A titanium nitride layer is formed on the Al—Cu layer of the wafer in the titanium nitride sputtering layer after cooling the wafer.

Abstract: Embodiments of the present invention relate to implanting arsenic into a wafer to quickly detect if there is metal contamination, such as iron, aluminum, or manganese, on the wafer. In accordance with an aspect of the present invention, a method for detecting metal contamination of a silicon chip comprises implanting arsenic ions into the silicon chip, and etching the silicon chip with a chemical etching solution. The existence of any metal contamination is detected by observing occurrence of silicon pits on the silicon chip caused by reaction between the arsenic ions and the metal contamination and etching with the chemical etching solution.