Patents Assigned to Motorola Computer X
  • Patent number: 5014192
    Abstract: A data management system used by a digital computer system comprises a plurality of individual file systems which are connected together in a logical ring configuration around which file requests travel. File requests may be transmitted by the user to the "next" file system in the ring relative to the user.File requests optionally may or may not specify a file system name. If a file system name is specified, then the request is forwarded unidirectionally around the logical ring until either that file system name is found or the request returns to its starting point. If no file system name is specified, then an attempt is made to satisfy the request on each file system in turn until either the request is satisfied or the request returns to its starting point.
    Type: Grant
    Filed: January 19, 1989
    Date of Patent: May 7, 1991
    Assignee: Motorola Computer X, Inc.
    Inventors: Bruce M. Mansfield, Frank C. Kolnick, Andrew I. Kun
  • Patent number: 4974148
    Abstract: A bus arbiter for a multi-processor computer provides fair access by dynamically adjusting a base variable of a counter which is determined from a processor number of a previously access-requesting processor having the highest processor number. The counter then varies priority between a minimum processor number, such as zero, and the base variable of the counter. The priority signal from the counter and the current access-requesting processors are then provided to a memory device. The memory device is used to determine which current access-requesting processor is permitted to access the bus.
    Type: Grant
    Filed: July 6, 1987
    Date of Patent: November 27, 1990
    Assignee: Motorola Computer X, Inc.
    Inventor: Keith D. Matteson
  • Patent number: 4959777
    Abstract: A "write-shared" cache circuit for multiprocessor systems maintains data consistency throughout the system and eliminates non-essential bus accesses by utilizing additional bus lines between caches of the system and by utilizing additional logic in order to enhance the intercache communication. Data is only written through to the system bus when the data is labeled "shared". A write-miss is read only once on the system bus in an "invalidate" cycle, and then it is written only to the requesting cache.
    Type: Grant
    Filed: July 27, 1987
    Date of Patent: September 25, 1990
    Assignee: Motorola Computer X
    Inventor: Thomas H. Holman, Jr.
  • Patent number: 4918572
    Abstract: Method and apparatus for packaging electronic equipment comprise a housing and a "midplane" that is removably secured to suitable flanges centrally located within the housing. Individual sub-modules (CPU, disk drive, I/O unit, power supply, etc.) have suitable electrical connectors which mate with corresponding connectors on the midplane. The sub-modules are inserted into the midplane from different sides of the housing. The exposed, outer surfaces of the sub-modules may either be finished in final form, or suitable bezels may be placed over the sides of the housing so that the sub-modules can be appropriately accessed for necessary replacement or repair.
    Type: Grant
    Filed: December 27, 1988
    Date of Patent: April 17, 1990
    Assignees: Motorola Computer X, Inc., Emtek Health Care Systems, Inc.
    Inventors: Carl R. Tarver, James G. Lawrence, Charles L. Whittington