Abstract: A charge pump (102) and method of charge pumping a low voltage (V.sub.DD)) to generate a higher voltage (V.sub.PP). A primary pump (160, 179, 180) receives complementary clock signals (CLK1, CLK2) that control charging and transfer cycles of the charge pump. During the charging cycle, a capacitor (150) stores a charge developed from the low voltage. On the transfer cycle, the charge is transferred to an output (138, 177, 178) through a switching transistor (152) disposed in a well region (202) to develop the higher voltage. A secondary pump (162, 187, 188) charge pumps the output voltage to generate a more positive bias voltage for biasing the well region to disable a parasitic PNP transistor of the switching transistor.

Abstract: According to the method and apparatus of the present disclosure, dual drain control uses a variable voltage supply on the drains of a first stage (302) and a second stage (304) to control the output power. In particular, dual drain control having a 1:1 ratio is employed at lower power levels, with single drain control at higher power levels. Such drain control could be employed by directly varying (1008, 1010) the voltage on the drains of the power amplifier, such as with signals from a microprocessor, or by a specific circuit (203) to generate the drain voltages based upon a control voltage.

Abstract: A carry case and electronic accessory assembly (100) provides direct interconnection between an external electronic accessory (104) and a portable radio (202) with minimal use of interface contacts. The external electronic accessory (104) includes a remote accessory (114) attached to a connector (106) having a substantially rigid portion (108) and a pivotal portion (110). The substantially rigid portion (108) attaches to the carry case housing (102) and provides a retention means within which the pivotal portion (110) can move. The pivotal portion (110) latches to the radio (202) to provide direct electrical contact between accessory contacts (124) of the external electronic accessory (104) and the radio contacts (204) of portable radio (202).

Abstract: Quantum random address memory apparatus including a low dimensional plurality of address ports, a plurality of nano-memory elements, mixer elements coupling the address ports to a high dimensional plurality of the plurality of nano-memory elements, and data output ports and structure coupled to the plurality of nano-memory elements. The high dimensional plurality of nano-memory elements is greater than the low dimensional plurality of address ports by a number resulting in substantially error free memory recalls.

Abstract: A feeder (1) for supplying magnetically attractable electrical components (20) to a pick-and-place machine. The feeder (1) comprises a hopper (2) for storing the components (20) and a pick up location (3) for supplying the components to the pick-and-place machine. A passage (4) provides communication between the hopper (2) and pick up location (3). An air jet outlet (6) in passage (4) provides for propelling the components (20) and one or more magnets (35) are located adjacent an intermediate portion of the passage (4) and provide a magnetic field to assist in reducing the velocity of said components (20) passing through the intermediate portion.

Abstract: A method for providing a gray scale in a field emission display (50) includes the step of providing a first driving pulse (214) having a pulse width equal to a pulse width separation (115) between the graphs (100, 200) of total charge response versus pulse width of a driving pulse for the non-ideal field emission display and the corresponding ideal field emission display. The pulse width separation (115) is the horizontal distance between the two graphs (100, 200) at a region wherein the two graphs (100, 200) are generally parallel. The pulse width, t.sub.n, of an nth driving pulse corresponding to an nth gray scale level is given by t.sub.n =t.sub.1 +[n-1]*[(t.sub.N -t.sub.1)/(N-1)], wherein t.sub.1 is the pulse width of the first driving pulse (214), N is the total number of gray scale levels, and t.sub.N is the pulse width of the Nth driving pulse.

Abstract: A switch network (22) in a Field Programmable Gate Array (FPGA) which operates as a combination of a programming transistor (34) and a ferroelectric transistor (32). The programming transistor (34) is selected to transfer a polarizing voltage to a gate terminal of the ferroelectric transistor (32) for programming the ferroelectric transistor (32) in an on-state. The ferroelectric transistor (32) functions as a nonvolatile latch and pass device to provide the electrical interconnect path that links multiple Configurable Logic Blocks (CLBs). The programming transistor (34) is selected to transfer a depolarizing voltage to the gate terminal of the ferroelectric transistor (32) for programming the ferroelectric transistor (32) in an off-state.

Abstract: A configurable cryptographic processing engine (100) provides high performance cryptographic processing support for symmetric combiner type cryptographic algorithms. As many as two independent cryptographic algorithms may be performed at the same time through the processes of background staging and algorithm multi-tasking. A 3-stage instruction pipeline, dynamically configurable cryptographic co-processor (550), and 32-bit RISC based architecture support high performance cryptographic processing performance on the order of 60 Mbps aggregate throughput.

Abstract: Described is an integral electrical contact block and printed circuit board for an electrical device. The electrical contacts arch over components on the printed circuit board and are secured to the printed circuit board at either end of the arch. A second arch is above the lower arch, secured to the lower arch at one end, forming a structure with an open mouth. This open mouth can capture a plastic housing. The contact provides protection for components beneath it, provides for efficient use of space in an electrical device, and the mouth of the contact absorbs shock that otherwise might be transmitted directly to solder joints on the printed circuit board.

Abstract: An extended VCSEL structure formed of a first DBR mirror, an active region, a second DBR mirror as partial reflector, and an extended cavity provided by a transparent conductive substrate wafer fused onto the second DBR mirror. The transparent conductive substrate also serves as a convex mirror with a highly reflective dielectric coating to complete the extended cavity VCSEL structure. The use of the extended cavity makes high power single mode operation achievable because an extended cavity introduces high modal loss to the high order laser modes while supporting the lowest order single mode. The large active area allows high output power from the VCSEL.

Abstract: A communication system (100) employs a method for providing software to a remote computer (e.g., 116) or network server (e.g., 114). The remote computer (or network server) and a host computer (101) each has a radio communication device (102, 115, 117) coupled to it. The remote computer transmits information related to the computer's present configuration to the host computer via the remote computer's radio communication device, wherein such information includes information indicating software applications presently contained within the remote computer. Based on the received configuration information, the host computer determines whether the remote computer is in need of software that compliments the software applications presently contained within the remote computer.

Abstract: A method of passivating interface states of oxide-compound semiconductor interfaces using molecular, atomic, or isotopic species wherein said species are applied before oxide deposition in ultra-high vacuum, or during interruption of oxide deposition in ultra-high vacuum (preferentially after oxide surface coverage of a submonolayer, a monolayer, or a few monolayers), or during oxide deposition in ultra-high vacuum, or after completion of oxide deposition, or before or after any processing steps of the as deposited interface structure. In a preferred embodiment, hydrogen or deuterium atoms are applied to a Ga.sub.2 O.sub.3 --GaAs interface at some point before, during, or after oxide deposition in ultra-high vacuum, or before or after any processing steps of the as deposited interface structure, at any given and useful substrate temperature wherein the atomic species can be provided by any one of RF discharge, microwave plasma discharge, or thermal dissociation.

Abstract: A process of patterning magnetic multilayer films including the steps of successively depositing a plurality of magnetic multilayer films on a supporting substrate, selectively removing portions of the plurality of magnetic multilayer films using a reactive plasma etch including chlorine gas, and passivating in situ, or an adjacent evacuated chamber, remaining portions of the plurality of magnetic multilayer films, i.e. the memory elements, in a post-etch fluorinated plasma.

Abstract: A method and apparatus reduces an output ripple signal of a power supply (200) for supplying a DC voltage and current to a load. One of the output ripple signal and an intermediate ripple signal is sensed to produce a control signal at a ripple sensing element (206), and a rectangular pulse carrier signal is generated by a pulse width modulator (302), the signal having a duty cycle modulated with the control signal to produce a pulse width modulated (PWM) signal carrying ripple signal energy. The rectangular pulse carrier signal operates at a frequency substantially higher than the control signal. The PWM signal is coupled into a portion of the power supply through a transformer (202). The transformer is arranged such that the PWM signal is combined with the intermediate ripple signal at an amplitude and relative phase sufficient to substantially reduce the output ripple signal.

Abstract: A dispatch controller (103) located logically external to an existing telephone network (101) is coupled to the existing telephone network. When an originating communication device (e.g., 111) desires to initiate a dispatch call, the originating device transmits a call request to the existing telephone network, wherein the call request includes an identification (ID) of the originating device and a target address associated with the dispatch controller. The existing telephone network provides the call request to the dispatch controller. Upon receiving the call request, the dispatch controller retrieves dispatch-related information from a database (105) coupled to the dispatch controller based on the originating device's ID. Based on the retrieved dispatch-related information, the dispatch controller identifies a group of target communication devices (e.g., 107-110) for the dispatch call.

Abstract: A central processing unit (2) and a debug module (10) execute concurrent operations without requiring a data processor (3) to operate in a special debug mode. The use of a bus (25) to communicate data, address, and control information between a core (9) and debug module (10) allows debug module (10) to have access the same internal registers and memory locations as central processing unit (2). While debug module (10) and central processing unte (2) both have the ability to access the same internal registers and memory locations, central processing unit (2) may not modify a value stored in a plurality of breakpoint registers (50) when an Inhibit Processor Writes to Debug Registers (IPW) bit in a CSR (FIG. 8) of a plurality of control registers (40) is set. The IPW bit may only be modified by a command provided by an external development system (7).

Abstract: An apparatus (105), system (100) and method is provided for a unified circuit switched and packet-based communications system architecture having network interworking functionality.

Abstract: An antenna (100) includes a radiating element (202) covered with a protective jacket having at least one pocket selectively located therein. The at least one pocket (102) is filled with a material (105) having an absorptive index substantially higher than the index of the protective jacket (102). This material imposes substantial restriction to the free radiation of radio frequency energy. Conversely, the remainder of the jacket (102) with no pockets provides for the unrestricted radiation of the radio frequency energy therethrough. As a result the antenna (100) directionally radiates energy without the use of reflectors or additional radiating elements.

Abstract: A sealable air gap (14) is formed between a heating element (16) and a base (11) to improve the thermal isolation of a semiconductor heater (10). A top layer (17) is formed over the heating element (16) which seals the air gap (14) so that the sealable air gap (14) can be at either atmospheric pressure or under a vacuum. The semiconductor heater (10) can be used in a variety of applications including as a heat source to adjust the resistivity of an overlying resistive layer (18). The embodiments of the semiconductor heater (10) also include a chemical sensor (20). Heat from a heating element (26) is used to keep an overlying layer of chemical sensing material (28) at an optimal temperature. The embodiments of the present invention also include a transducer (40) to heat a fluid (52) in a well (55) such as in an ink jet application.