Abstract: An integrated electronic component for broadband biasing that includes a monolithic substrate, a capacitor structure arranged in a trench network that extends into the substrate, and a continuous track of an electrically conducting material arranged in a crater that is formed in the substrate. The continuous track has one or several turns that have decreasing turn sections, and that are supported by a slanted peripheral wall of the crater for forming an inductor.

Abstract: An electrical stimulation and monitoring device that includes multiple signal paths that are connected in parallel with each other, and each containing a stimulation or sensing electrode, a DC-blocking capacitor and a stimulation or sensing channel. A semiconductor substrate provided for hosting the DC-blocking capacitors is connected electrically to a DC voltage source through a substrate holding capacitor. Such substrate holding capacitor reduces a blanking time between stimulation and sensing periods, and also reduces cross-couplings between different ones of the signal paths while all the DC-blocking capacitors are provided on one and same semiconductor substrate.

Abstract: A Metal-Insulator-Metal type capacitor structure (1) comprising a substrate (2), a first electrically insulating layer (14) placed on the substrate (2), a lower electrode (6) placed on the first insulating layer (14), a layer of structured metal (12) comprising a plurality of pores disposed on the lower electrode (6), a MIM capacitor (4) comprising a first conductive layer (18) placed on the structured metal layer (12) in contact with the lower electrode (6) and inside the pores, a dielectric layer (20) covering the first conductive layer (18), a second conductive layer (24) covering the dielectric layer (20) in contact with an upper electrode (8) placed on the MIM capacitor (4) and a second electrically insulating layer (16) placed on the upper electrode (8).

Abstract: An electrical stimulation and monitoring device that includes multiple signal paths that are connected in parallel with each other, and each containing a stimulation or sensing electrode, a DC-blocking capacitor and a stimulation or sensing channel. A semiconductor substrate provided for hosting the DC-blocking capacitors is connected electrically to a DC voltage source through a substrate holding capacitor. Such substrate holding capacitor reduces a blanking time between stimulation and sensing periods, and also reduces cross-couplings between different ones of the signal paths while all the DC-blocking capacitors are provided on one and same semiconductor substrate.

Abstract: A 3D-capacitor structure that is based on a trench network etched from a top face of a substrate to form an array of separated pillars. The 3D-capacitor structure includes a double capacitor layer stack that extends continuously on top faces of the pillars at the substrate top face, on trench sidewalls and also on a trench bottom. The trench network is modified locally for contacting a second electrode of the double capacitor layer stack while ensuring that no unwanted short-circuit may occur between the second electrode and a third electrode of the double capacitor layer stack. The 3D-capacitor structure provides an improved trade-off between high capacitor density and certainty of no unwanted short-circuit.

Abstract: A semiconductor device comprising at least two holes (18, 20) realized in a substrate (6), having each a width and a depth, and forming a diode (4), wherein the substrate (6) has a determined type of doping, wherein the inner wall of each hole (18, 20) is doped so that its doping is of the other type than the doping of the substrate (6), and wherein the width and/or the depth of a hole (18, 20) is different from the width and/or the depth of a neighboring hole.