Patents Assigned to Namyang Technological University of Singapore
  • Patent number: 6468906
    Abstract: An interconnect line on an IMD layer on a semiconductor device is formed in an interconnect hole in the IMD layer. The interconnect hole has walls and a bottom in the IMD layer. A diffusion barrier is formed on the walls and the bottom of the hole. Fill the interconnect hole with a copper metal line. Perform a CMP step to planarize the device and to remove copper above the IMD layer. Deposit a passivating metal layer on the surface of the copper metal line encapsulating the copper metal line at the top of the hole. Alternatively, a blanket deposit of a copper metal line layer covers the diffusion layer and fills the interconnect hole with a copper metal line. Perform a CMP process to planarize the device to remove copper above the IMD layer. Deposit a passivating metal layer on the surface of the copper metal line encapsulating the copper metal line at the top of the hole in a self-aligned deposition process.
    Type: Grant
    Filed: July 14, 2000
    Date of Patent: October 22, 2002
    Assignees: Chartered Semiconductor Manufacturing Ltd., National University of Singapore, Namyang Technological University of Singapore, Institute of Microelectronics
    Inventors: Lap Chan, Kuan Pei Yap, Kheng Chok Tee, Flora S. Ip, Wye Boon Loh