Patents Assigned to NanoChips, Inc.
  • Patent number: 9097719
    Abstract: The present system relates to a system architecture that uses a single electron transistor (SET) to analyze base sequences of deoxyribonucleic acid (DNA) at ultra high speed in real time. DNA represents the entire body of genetic information and consists of nucleotide units. There are a total of four types of nucleotides, and each nucleotide consists of an identical pentose (deoxyribose), phosphate group, and one of four types of bases (Adenine: A, Guanine: G, Cytosine: C, Thymine: T). A and G are purines having a bicyclic structure while C and T are pyrimidines having a monocyclic structure. Each has a different atomic arrangement, which signifies a different charge distribution from one another. Therefore, a system comprising a single electron transistor that is very sensitive to charges, a probe of a very small size that reacts to one nucleotide very effectively, and an extended gate that connects the SET with the probe, can be used to analyze DNA base sequences at ultra high speed in real time.
    Type: Grant
    Filed: October 8, 2009
    Date of Patent: August 4, 2015
    Assignee: NanoChips, Inc.
    Inventors: Jung Bum Choi, Jong Jin Lee
  • Patent number: 8178369
    Abstract: The present invention relates to a method of fabricating a nanoscale multi-junction quantum dot device wherein it can minimize constraints depending on the number or shape of patterns and a line width, and in particular, overcome shortcomings depending on the proximity effect occurring between patterns while employing the advantages of electron beam lithography to the utmost by forming a new conductive layer between the patterns and utilizing it as a new pattern.
    Type: Grant
    Filed: October 8, 2007
    Date of Patent: May 15, 2012
    Assignee: Nanochips, Inc.
    Inventors: Jung Bum Choi, Jong Jin Lee, Seung-Jun Shin, Rae-Sik Chung
  • Patent number: 8158538
    Abstract: The present invention relates to a single-electron transistor (SET) operating at room temperature and a method of manufacturing the same, and to be specific, to a single-electron transistor operating at room temperature and a method of manufacturing the same, which are capable of minimizing influence of the gate voltage on tunneling barriers and effectively controlling the electric potential of a quantum dot (QD), by forming the quantum dot using a trenched nano-wire structure and forming the gate to wrap most of the way around the quantum dot.
    Type: Grant
    Filed: September 1, 2010
    Date of Patent: April 17, 2012
    Assignee: Nanochips, Inc.
    Inventors: Jung Bum Choi, Seung Jun Shin
  • Patent number: 8059451
    Abstract: Provided is a multi-valued dynamic random access memory (DRAM) cell using a single electron transistor (SET). The multi-valued DRAM cell using the SET applies different refresh signals to a load current transistor for controlling current supply to the SET and a voltage control transistor for controlling a terminal voltage of the SET and refreshes a data value stored in the SET by a predetermined period to reduce standby current and stably supply a voltage low enough to satisfy a coulomb-blockade condition to the terminal of the SET.
    Type: Grant
    Filed: December 20, 2007
    Date of Patent: November 15, 2011
    Assignee: NanoChips, Inc.
    Inventors: Bok Nam Song, Jung Bum Choi, Hun Woo Kye
  • Publication number: 20100315938
    Abstract: A package to receive a memory device including an electromagnetic motor comprises a body having a top surface and a bottom surface. Conductive leads extend through the body so that the conductive leads are at least partially exposed within the package. A base is connectable with the bottom surface of the body, and a lid is connectable with the top surface of the body. The base and the lid have substantially matched thermal expansion characteristics and provide magnetic flux return paths for the electromagnetic motor.
    Type: Application
    Filed: August 14, 2008
    Publication date: December 16, 2010
    Applicant: NANOCHIP, INC.
    Inventors: Peter David Ascanio, Tom P. Frangesh
  • Publication number: 20100208573
    Abstract: An information storage device comprises a media including a ferroelectric layer and a conductive layer and a cantilever adapted to be actuated toward the media. A tip extends from the cantilever and an electrode associated with the cantilever. When the cantilever is actuated, the tip applies a contact force to strain the media so that a charge is coupled from the ferroelectric layer to the tip. A signal is applied to the electrode to generate electrostatic force between the electrode and the conductive layer, causing the cantilever to vibrate based on a frequency of the signal. Vibration of the cantilever causes the contact force applied by the tip to the media to vary. Polarization of the ferroelectric layer can be determined based on one or both of a baseband signal generated by the charge accumulated at the tip and an upper-band signal generated by the variation in phase of the charge accumulated at the tip.
    Type: Application
    Filed: August 17, 2009
    Publication date: August 19, 2010
    Applicant: NANOCHIP, INC.
    Inventor: Donald E. Adams
  • Publication number: 20100100991
    Abstract: A device to detect polarization of a ferroelectric material comprises a probe tip, a charge amplifier electrically connected with the probe tip to convert a charge coupled to the probe tip from the ferroelectric material into an output voltage. The ferroelectric material is oscillated at a reference signal so that a charge is coupled to the probe tip and converted to an output voltage by the charge amplifier. A lock-in amplifier that receives the reference voltage and applies the reference voltage to the output voltage to extract a signal output representing the polarization.
    Type: Application
    Filed: October 20, 2008
    Publication date: April 22, 2010
    Applicant: NANOCHIP, INC.
    Inventors: Byong M. Kim, Robert N. Stark, Quan Tran, Wade Hassler, Qing Ma, Donald E. Adams, Yevgeny V. Anoikin
  • Publication number: 20100085863
    Abstract: Provided herein are embodiments for adjusting a built-in bias of a media including a conductive layer and a ferroelectric layer above the conductive layer. In certain embodiments, a voltage signal is applied between the conductive layer of the media and an electrode (provided over at least a portion of the ferroelectric layer) to thereby tune the built-in bias so that the built-in bias moves in a direction of (i.e., towards) the desired built-in bias. In other embodiments, the temperature of the at least a portion of the ferroelectric layer of the media is elevated to thereby tune the built-in bias so that the built-in bias moves in a direction of (i.e., towards) the desired built-in bias. The desired built-in bias can be a zero built-in bias, or a non-zero built-in bias.
    Type: Application
    Filed: October 28, 2008
    Publication date: April 8, 2010
    Applicant: NANOCHIP, INC.
    Inventors: Nathan Franklin, Quan A. Tran, Qing Ma
  • Publication number: 20100068509
    Abstract: Provided herein are media for storing information and methods of forming such media. A strontium ruthenate (SRO) layer is provided. In certain embodiments, a titanium terminated (Ti-terminated) surface is formed on the SRO layer, and a lead zirconate titanate (PZT) layer is formed on the Ti-terminated surface. In other embodiments, a Ti-terminated surface is formed on the SRO layer, a lead titanate (PTO) layer is formed on the Ti-terminated surface, and a PZT layer is formed on the PTO layer. Preferably, the PZT layer is grown on the Ti-terminated surface, or the PTO layer, by step-flow or layer-by-layer growth, so that the resulting media has an atomically smooth surface.
    Type: Application
    Filed: October 24, 2008
    Publication date: March 18, 2010
    Applicant: NANOCHIP, INC.
    Inventors: Qing Ma, Nathan Franklin, Li-Peng Wang, Robert Chen
  • Publication number: 20100039729
    Abstract: A packaged memory device for storing information comprises a stack, a package lid, a first magnet structure fixedly connected to the package lid, a package body and a second magnet structure connected with the package body. The stack includes a tip substrate, a cap, and a media arranged between the tip substrate and cap and movable relative to the tip substrate. The tip substrate includes a plurality of tips extending from the tip substrate so that the tips can access the media. The first magnet structure includes a first magnet connected with a first flux plate. The second magnet structure includes a second magnet connected with a second flux plate. The second flux plate is integrated with the package body so that the second flux plate provides structural rigidity to the package body. The stack is connected to one or both of the package body and the second magnet.
    Type: Application
    Filed: August 14, 2008
    Publication date: February 18, 2010
    Applicant: NANOCHIP, INC.
    Inventors: John Heck, Nickolai Belov, Steve Greathouse
  • Publication number: 20100039919
    Abstract: An information storage device comprises a media including a ferroelectric layer formed over a conductive layer, a tip substrate including a bottom actuation electrode, the tip substrate arranged opposite the media, and a cantilever connected with the tip substrate at a fulcrum and actuatable toward the media. The cantilever includes a first portion and a second portion, with the fulcrum located between the first portion and the second portion. The first portion is conductive and arranged over the bottom actuation electrode while a top actuation electrode is associated with the second portion so that the top actuation electrode is opposite the media. A first potential is applied to the bottom actuation electrode to generate electrostatic force between the bottom actuation electrode and the first portion and a second potential is applied to the top actuation electrode to generate electrostatic force between the top actuation electrode and the conductive layer.
    Type: Application
    Filed: September 10, 2008
    Publication date: February 18, 2010
    Applicant: NANOCHIP, INC.
    Inventors: Tsung-Kuan Allen Chou, David Harrar, II
  • Publication number: 20100002563
    Abstract: A media for storing information comprises a substrate, a conductive layer formed over the substrate, and a ferroelectric layer epitaxially formed on the conductive layer. The ferroelectric layer includes an a-lattice constant that is substantially matched to an a-lattice constant of the conductive layer and an average c-lattice constant that is longer than an average c-lattice constant of a bulk-grown ferroelectric layer.
    Type: Application
    Filed: July 1, 2008
    Publication date: January 7, 2010
    Applicant: NANOCHIP, INC.
    Inventors: Byong M. Kim, Jingwei Li, Pu Yu, Donald E. Adams, Ying-Hao Chu, Yevgeny V. Anoikin, Ramamoorthy Ramesh, Li-Peng Wang
  • Publication number: 20090294028
    Abstract: A method of fabricating an information storage device comprises providing a media substrate including a first side and a second side, forming a media on the first side of the media substrate, adhesively associating the media with a carrier substrate, thinning a surface of the second side of the media substrate while supporting and protecting the media with the carrier substrate, and forming circuitry on the thinned second side of the media substrate.
    Type: Application
    Filed: June 3, 2008
    Publication date: December 3, 2009
    Applicant: NANOCHIP, INC.
    Inventors: John Heck, Nickolai Belov, Zebulah Nathan Rapp, Terry Zhu
  • Patent number: 7626846
    Abstract: A media for an information storage device includes a substrate of single-crystal silicon, a buffer layer of an epitaxial single crystal insulator formed over the substrate, a bottom electrode layer of an epitaxial single crystal conductor formed over the buffer layer, a ferroelectric layer of an epitaxial single crystal ferroelectric material formed over the bottom electrode layer, and an overlayer of an epitaxial single crystal material formed over the ferroelectric layer. Dipole charges generally having a first orientation exist at an interface between the bottom electrode layer and the ferroelectric layer includes, while dipole charges generally having a second orientation opposite the first orientation exist at an interface between the ferroelectric layer and the overlayer includes.
    Type: Grant
    Filed: July 16, 2007
    Date of Patent: December 1, 2009
    Assignee: Nanochip, Inc.
    Inventors: Valluri Ramana Rao, Li-Peng Wang, Qing Ma, Byong Man Kim
  • Publication number: 20090213492
    Abstract: A memory device comprises a ferroelectric media comprising at least one ferroelectric film. The ferroelectric film has an as-grown spontaneous polarization of a first direction. A tip is position over the ferroelectric film and a first voltage is applied to the tip larger than a switching voltage of the ferroelectric film. One or both of the tip and the ferroelectric media is moved to form a first domain having a spontaneous polarization of opposite the first direction. The tip is then positioned over the first domain and a second voltage to the tip smaller than the first voltage to form a second domain smaller than the first domain and having a polarization of the first direction, the second domain defining the bit.
    Type: Application
    Filed: February 22, 2008
    Publication date: August 27, 2009
    Applicant: NANOCHIP, INC.
    Inventor: Quan A. Tran
  • Publication number: 20090201015
    Abstract: An information storage device comprises a ferroelectric media and a cantilever including a tip extending from the cantilever toward the ferroelectric media, and a capacitive sensor formed over the cantilever. The tip applies a probe voltage to the ferroelectric media and the capacitive sensor vibrates according to a response of the ferroelectric media to the probe voltage. Circuitry determines a polarization of the ferroelectric media based on the vibration of the capacitive sensor.
    Type: Application
    Filed: February 12, 2008
    Publication date: August 13, 2009
    Applicant: NANOCHIP, INC.
    Inventors: Donald Edward Adams, Tsung-Kuan Allen Chou, Robert N. Stark
  • Publication number: 20090129246
    Abstract: A system for storing information comprises a package including a lid, a bowl mateable with the lid, and leads extending from an interior of the package to an exterior of the package. A magnet structure includes a first flux plate and a magnet and is fixedly connected with the lid by way of the first flux plate. A media stack includes a cap including cut-outs for receiving at least a portion of the magnet structure, a media frame connected to the cap, a tip die connected to the media frame, and a second flux plate connected with the tip die. A movable media platform is movably connected with the frame and arranged between the cap and the tip die. An electric trace is formed on the media platform so that the electric trace is arranged between the media platform and the cap. A media is fixedly associated with the movable media platform and accessible to the tip die. The media stack is seated within the bowl and wire-bonded to the leads.
    Type: Application
    Filed: November 12, 2008
    Publication date: May 21, 2009
    Applicant: NANOCHIP, INC.
    Inventor: Peter David Ascanio
  • Publication number: 20090129247
    Abstract: An information storage device comprises a ferroelectric media, write circuitry to provide a first signal and a second signal to the ferroelectric media, a tip platform and a cantilever operably associated with the tip platform. A tip extends from the cantilever toward the ferroelectric media and includes a first conductive material communicating the first signal from the write circuitry to the ferroelectric media and a second conductive material communicating the second signal from the write circuitry to the ferroelectric media. A insulating material arranged between the first conductive material and the second conductive material to electrically isolate the first conductive material from the second conductive material.
    Type: Application
    Filed: November 12, 2008
    Publication date: May 21, 2009
    Applicant: NANOCHIP, INC.
    Inventors: Quan A. Tran, Qing Ma, Donald Edward Adams, Nickolai Belov, Yevgeny Vasilievich Anoikin
  • Publication number: 20090065350
    Abstract: A dual-cathode arc plasma source is combined with a computer-controlled bias amplifier to synchronize substrate bias with the pulsed production of plasma. Accordingly, bias can be applied in a material-selective way. The principle has been applied to the synthesis metal-doped diamond-like carbon films, where the bias was applied and adjusted when the carbon plasma was condensing, and the substrate was at ground when the metal was incorporated. In doing so, excessive sputtering by too-energetic metal ions can be avoided while the sp3/sp2 ratio can be adjusted. It is shown that the resistivity of the film can be tuned by this species-selective bias. The principle can be extended to multiple-material plasma sources and complex materials.
    Type: Application
    Filed: September 5, 2008
    Publication date: March 12, 2009
    Applicant: NANOCHIP, INC.
    Inventor: Andre Anders
  • Publication number: 20080316897
    Abstract: A method of forming a passivation layer over a ferroelectric layer of a ferroelectric media comprises introducing the ferroelectric layer to a plasma comprising one of oxygen, oxygen-helium, and oxygen-nitrogen-helium, etching a surface of the ferroelectric layer, forming one of a substantially oxygen enriched layer and a substantially hydroxyl enriched layer at the surface of the ferroelectric layer, introducing the ferroelectric layer to an environment comprising substantially nitrogen, and maintaining the ferroelectric layer within the environment so that nitrogen enriches the substantially oxygen enriched layer to form a passivation layer.
    Type: Application
    Filed: June 19, 2007
    Publication date: December 25, 2008
    Applicant: NANOCHIP, INC.
    Inventors: Byong Man KIM, Donald Edward ADAMS, Brett Eldon HUFF, Yevgeny V. ANOIKIN, Robert N. STARK