Patents Assigned to NANYA TECHNOLOGY CORPORATON
  • Publication number: 20020119621
    Abstract: A method of fabricating a trench capacitor of a memory cell. A pad layer is formed on the substrate, and a deep trench is then formed. A residual first insulating layer is conformably formed on the sidewall and bottom of the trench, wherein the upper surface of the residual first insulating layer is lower than that of the substrate. A residual non-doped layer is conformably formed on the first insulating layer, wherein the upper surface of the residual non-doped layer is between the upper surfaces of the residual first insulating layer and the substrate. A residual doped insulating layer is conformably formed on the residual non-doped layer, wherein the upper surface of the residual doped insulating layer is substantially level with that of the residual non-doped layer. A second insulating layer is conformably formed on the pad layer and the inner surface of the trench.
    Type: Application
    Filed: February 7, 2002
    Publication date: August 29, 2002
    Applicant: NANYA TECHNOLOGY CORPORATON
    Inventor: Shian-Jyh Lin