Patents Assigned to Nassda Corporation
  • Hybrid system of static analysis and dynamic simulation for circuit design
    Patent number: 6820243
    Abstract: A method and system for simulating a circuit design that includes analog and/or digital circuitry uses a hybrid system of static analysis and dynamic simulation. Once the user's circuit is read in and partitioned into stages, the input vectors are applied. A hybrid vector is used to represent a number of possible signal states, for example, a logic 0 or logic 1, as well as a number of possible signal transitions, for example, a rising signal or a falling signal. The possible combinations of states are enumerated and the network in the stage is solved for all possible combinations. The results from the network solutions for the different combinations are recomposed into the hybrid notation, which is then applied to the next stage.
    Type: Grant
    Filed: September 19, 2001
    Date of Patent: November 16, 2004
    Assignee: Nassda Corporation
    Inventors: An-Jui Shey, Henry Horng-Fei Jyu, An-Chang Deng
  • Hybrid system of static analysis and dynamic simulation for circuit design
    Patent number: 6718525
    Abstract: A method and system for simulating a circuit design that includes analog and/or digital circuitry uses a hybrid system of static analysis and dynamic simulation. Once the user's circuit is read in and partitioned into stages, the input vectors are applied. A hybrid vector is used to represent a number of possible signal states, for example, a logic 0 or logic 1, as well as a number of possible signal transitions, for example, a rising signal or a falling signal. The possible combinations of states are enumerated and the network in the stage is solved for all possible combinations. The results from the network solutions for the different combinations are recomposed into the hybrid notation, which is then applied to the next stage.
    Type: Grant
    Filed: September 19, 2001
    Date of Patent: April 6, 2004
    Assignee: Nassda Corporation
    Inventors: An-Jui Shey, Henry Horng-Fei Jyu, An-Chang Deng
  • Transistor level circuit simulator using hierarchical data
    Patent number: 6577992
    Abstract: Methods and apparatus for generating a hierarchical representation of a circuit include obtaining a netlist corresponding to the circuit, the circuit including a plurality of subcircuits. A hierarchical representation of the circuit is then generated from the netlist, the hierarchical representation including the plurality of subcircuits arranged among a plurality of levels of the hierarchical representation. Each one of the plurality of subcircuits has an associated subcircuit definition. In addition, each of a plurality of subsets of the subcircuits share a same subcircuit definition, where memory storage for the same subcircuit definition is shared by the subcircuits in each of the subsets. Moreover, each one of the plurality of subcircuits has a dynamic voltage state.
    Type: Grant
    Filed: May 7, 1999
    Date of Patent: June 10, 2003
    Assignee: Nassda Corporation
    Inventors: Andrei Tcherniaev, Iouri Feinberg, Walter Chan, Jeh-Fu Tuan, An-Chang Deng