Abstract: A system and method for estimating the shift between two signals. The shift estimation system method comprises: (a) receiving a first signal, where the first signal may be represented as a vector g having N components; (b) projecting the vector g to a space with dimension K less than N to obtain a projection vector X having K components; (c) computing measures of distance between the projection vector X and each vector in a set of stored vectors; (d) determining a stored vector p in the set of stored vectors with a minimum distance to the projection vector X. The stored vectors are generated from a template signal f, also represented as a vector with N components, by projecting shifted versions of the template signal f to the space of dimension K. The shifted versions of the template signal f may be referred to as shifted template vectors, or simply, shift vectors.

Abstract: A Data Socket client and associated applications and/or tools which provide programs with access to data from various sources and having various types or formats, wherein the access is provided invisibly to the user. The Data Socket client allows the user or program to access any data source available on the user's machine as well as data anywhere on a network, such as a LAN, WAN or the Internet. In the preferred embodiment, the Data Socket client addresses data sources or I/O sources using a URL (uniform resource locator), much the way that a URL is used to address web pages anywhere in the world. The present invention also includes new Data Socket URLs which allow the user to access I/O sources.

Abstract: A system and method for transferring data over a communications medium. A host is coupled to a device through a serial bus lacking error handling capabilities, such as an IEEE 1394 bus. The host may control the device by sending requests accessing its memory registers. The host generates a first request to the device to access a memory address location of the device, and which includes an address and status information indicating whether a prior request to the memory address location returned successfully. The device examines the status information to determine if it is a retry of a prior request, and if so, determines if the prior request completed successfully to the memory address location by comparing the address and data transfer size of the first request to those of the prior request. If identical, then the prior request completed successfully to the memory address location, and the request is ignored. Otherwise, the device retries the prior request.

Abstract: A Data Socket client and associated applications and/or tools which provide programs with access to data from various sources and having various types or formats, wherein the access is provided invisibly to the user. The Data Socket client allows the user or program to access any data source available on the user's machine as well as data anywhere on a network, such as a LAN, WAN or the Internet. In the preferred embodiment, the Data Socket client addresses data sources or I/O sources using a URL (uniform resource locator), much the way that a URL is used to address web pages anywhere in the world. The present invention also includes new Data Socket URLs which allow the user to access I/O sources.

Abstract: A computer-implemented system and method for generating a hardware implementation of graphical code. The method comprises first creating a graphical program. A first portion of the graphical program may optionally be compiled into machine code for execution by a CPU. A second portion of the graphical program is converted into a hardware implementation according to the present invention. The operation of converting the graphical program into a hardware implementation comprises exporting the second portion of the graphical program into a hardware description, wherein the hardware description describes a hardware implementation of the second portion of the graphical program, and then configuring a programmable hardware element utilizing the hardware description to produce a configured hardware element. The configured hardware element thus implements a hardware implementation of the second portion of the graphical program.

Abstract: System and method for estimating a rotational shift between a first discrete curve and a second discrete curve, where the second discrete curve is a rotationally shifted version of the first discrete curve. First and second discrete curves are received. A rotational shift between the first discrete curve and the second discrete curve is estimated based on the first discrete curve and the second discrete curve. A cumulative rotational shift is updated based on the estimated rotational shift. A rotationally shifted version of the second discrete curve is generated based on the cumulative rotational shift. The estimating, updating, and generating are performed in an iterative manner using the respective rotationally shifted discrete curve for each iteration until a stopping condition occurs, thereby determining a final estimate of the rotational shift between the first discrete curve and the second discrete curve. The final estimate may be used to perform curve matching.

Abstract: A computer-based virtual instrumentation system including a host computer and an embedded system or device, wherein graphical programs created using the computer system can be downloaded to the embedded system for execution in a real-time or more deterministic manner. The present invention thus provides a method for automatically generating an embedded application in response to a graphical program created by a user. This provides the user the ability to develop or define instrument functionality using graphical programming techniques, while enabling the resulting program to operate in an embedded real-time system. The invention includes a novel method for configuring the embedded system. During execution of a graphical program in the embedded system, the block diagram portion executes in the embedded system, and the host CPU executes front panel display code to display on the screen the graphical front panel of the graphical program.

Abstract: A system and method for GPIB autopolling of GPIB devices. A computer is coupled to one or more GPIB instruments through a GPIB to analyze, measure or control a process or unit under test. The computer includes a GPIB controller which monitors activity of the GPIB devices on the bus and produces heuristic information regarding the past behavior of the GPIB devices, such as a queue of one or more GPIB device IDs sorted by how recently each device was accessed. The heuristic information produced is stored on a memory and/or hard drive of the computer. A service request (SRQ) line assertion triggered by one or more GPIB devices may be received. The GPIB controller performs autopolling on the GPIB devices as ordered in the queue to determine which of the devices asserted the SRQ. If no queued devices asserted, the remainder of the devices are polled in arbitrary order.

Abstract: A system and method for debugging a program which is intended to execute on a reconfigurable device. A computer system stores a program that specifies a function, and which is convertible into a hardware configuration program (HCP) and deployable onto a programmable hardware element comprised on the device. The HCP is generated based on the program, specifies a configuration for the programmable hardware element that implements the function, and further specifies usage of one or more fixed hardware resources by the programmable hardware element in performing the function. A test configuration is deployable on the programmable hardware element by a deployment program, where, after deployment, the programmable hardware element provides for communication between the fixed hardware resources and the program. The program is executable by a processor in the computer system, where during execution the program communicates with the one or more fixed hardware resources through the programmable hardware element.

Abstract: A system and method for analyzing a surface. The system includes a computer including a CPU and a memory medium operable to store programs executable by the CPU to perform the method. The method may include: 1) receiving data describing an n-dimensional surface defined in a bounded n-dimensional space, where the surface is embedded in an m-dimensional real space via embedding function x( ), and where m>n; 2) determining a diffeomorphism f of the n-dimensional space; 3) computing the inverse transform f−1 of the diffeomorphism f; 4) selecting points, e.g., a Low Discrepancy Sequence, in the n-dimensional space; 5) mapping the points onto the surface using x(f−1), thereby generating mapped points on the surface; 6) sampling the surface using at least a subset of the mapped points to generate samples of the surface; and 7) analyzing the samples of the surface to determine characteristics of the surface.

Abstract: A system and method for configuring a device to perform a function, where the device includes a programmable hardware element and one or more fixed hardware resources. A program is stored which represents the function. A hardware configuration program is generated based on the program, specifying a configuration for the programmable hardware element that implements the function, and usage of the fixed hardware resources by the programmable hardware element in performing the function. A deployment program deploys the hardware configuration program onto the programmable hardware element, where, after deployment, the device is operable to perform the function, where the programmable hardware element directly performs a first portion of the function, and the programmable hardware element invokes the fixed hardware resources to perform a second portion of the function. An optional measurement module couples to the device and performs signal conditioning and/or conversion logic on an acquired signal for the device.

Abstract: The coupling apparatus couples two cards of a first size to fit in to a chassis having slots of second size. The coupling apparatus can connect two 3U cards together by clamping the first card and the second card between a first plate and a second plate to effectively form a combined card of a second size. Thus two 3U cards can be connected together and inserted into a 6U slot in a 6U chassis.

Abstract: A computer-implemented system and method for generating a hardware implementation of graphical code. The method may operate to configure an instrument to perform measurement functions, wherein the instrument includes a programmable hardware element. The method comprises first creating a graphical program, wherein the graphical program may implement a measurement function. A portion of the graphical program may optionally be compiled into machine code for execution by a CPU, and another portion of the graphical program may be converted into a hardware implementation on a programmable hardware element. The programmable hardware element is configured utilizing a hardware description to produce a configured hardware element. The configured hardware element thus implements a hardware implementation of the second portion of the graphical program.

Abstract: A variable time constant integrator includes an amplifier configured to generate an output signal, a capacitor coupled to provide feedback to the amplifier, and a variable gain element coupled to the output of the amplifier and to the capacitor. The variable gain element is configured to provide the product of a gain and the output signal to the capacitor. The variable gain element is also configured to receive an indication of a new value of the gain and to responsively set the gain equal to the new value of the gain. Adjusting the gain of the variable gain element adjusts the integrator's time constant.

Abstract: A digitizer for use in a measurement system. The digitizer acquires data from an external source, and includes a static random access memory (SRAM) which stores a scan list comprising entries specifying digitizer operations such as switch time, settle time, measure time, looping, and mathematical operation specifications such as scaling, adding, and averaging specifications. The looping specification may include instructions to repeatedly execute one or more entries in the scan list. The digitizer includes a programmable logic element (e.g. an FPGA) coupled to the SRAM which accesses and executes the scan list to acquire analog signals from the source. The digitizer may include an analog-to-digital converter to convert the analog signals to digital signals, as well as a multiplexer to read the analog signals from multiple channels, a signal conditioner to modify the analog signals from the multiplexer, and an amplifier to amplify the analog signals from the signal conditioner.

Abstract: A system and method for calibrating an analog to digital (A/D) converter. The A/D converter includes an internal D/A converter, wherein the internal D/A converter includes a plurality of current generators, and wherein one or more of the current generators may produce linearity errors in the A/D converter. The A/D converter includes a switching element connected to the internal D/A converter. During calibration, the switching element operates to adjust connections to the current generators in the internal D/A converter one or more times according to different switching patterns, thereby causing different ones of the current generators to be stimulated by an input to the A/D converter. This avoids the necessity of using a complex and costly waveform generator input during calibration, which would normally be required to ensure that all of the current generators in the internal D/A converter are stimulated. Rather, a much simpler input can be used in calibrating the A/D converter, thereby reducing cost.

Abstract: A computer-implemented system and method for generating a hardware implementation of graphical code. The method may operate to configure an instrument to perform measurement functions, wherein the instrument includes a programmable hardware element. The method comprises first creating a graphical program, wherein the graphical program may implement a measurement function. A portion of the graphical program may optionally be compiled into machine code for execution by a CPU, and another portion of the graphical program may be converted into a hardware implementation on a programmable hardware element. The programmable hardware element is configured utilizing a hardware description to produce a configured hardware element. The configured hardware element thus implements a hardware implementation of the second portion of the graphical program.

Abstract: A test executive program which provides greatly improved configurability and modularity, thus simplifying the creation, modification and execution of test sequences. The test executive program includes process models for improved flexibility, modularity and configurability. Process models provide a modular and configurable entity for encapsulating operations and functionality associated with a class of test sequences. The process model thus encapsulates a “testing process” for a plurality of test sequences. The process model enables the user to write different test sequences without repeating standard testing operations in each sequence. The test executive program also includes step types for improved configurability. A step type is a modular, identifiable unit configured by the user which defines common properties and/or operations associated with a plurality of steps.

Abstract: A system and method for connecting a plurality of terminal blocks. An expansion plug includes a first connector and a second connector which are electrically connected to each other. Each terminal block includes at least one plug connector to couple to one of the two connectors of the expansion plug, and may include both a top plug connector and a bottom plug connector to couple to a neighboring terminal block via the expansion plug using either top plug connectors or bottom plug connectors. Each of the plurality of terminal blocks couples to a corresponding switching module to form a plurality of switch matrices. Successive terminal block pairs are coupled via top and bottom plug connectors in an alternating manner, thus coupling any number of terminal block/module pairs together via expansion plugs in an interleaved manner, such that the plurality of switch matrices are integrated into a single integrated switch matrix.

Abstract: System and method for configuring a client system, e.g., a measurement system. First input is received from a client system over a network requesting access to a plurality of configuration diagrams comprising respective solutions to respective tasks. At least a subset of the plurality of configuration diagrams is displayed on a display device of the client system for viewing by a user. Second input is received from the client system selecting one of the displayed configuration diagrams indicating a solution for a task to be performed by the client system. The solution is provided to the client system over the network, and may include the selected configuration diagram and/or pricing information for proposed products. The configuration diagrams are stored in a configuration diagram database. The stored configuration diagrams may be pre-defined solutions for pre-defined tasks, generated in response to received user requirements, and/or received from client systems and/or vendors.