Abstract: A heat sink includes a thermally conductive base. The thermally conductive base has a first surface, a second surface, a guiding surface and an accommodating recess. The second surface faces away from the first surface. The guiding surface are connected to the first surface and the second surface. The guiding surface is not perpendicular to the first surface and the second surface. The accommodating recess is located at the first surface. The thermally conductive base has an inner bottom surface and an inner annular side surface which surround and form the accommodating recess. The inner annular side surface is connected to the inner bottom surface. The accommodating recess accommodates a heat source. The inner bottom surface is thermally coupled to the heat source.

Abstract: A device includes a first transistor, a second transistor, an interlayer dielectric (ILD) layer, and a backside gate rail. The first and second transistors are arranged along a first direction in a top view. The first transistor includes a first channel layer, a gate structure surrounding the first channel layer, a first source/drain epitaxial structure and a second source/drain epitaxial structure connected to the first channel layer. The second transistor includes a second channel layer, the gate structure surrounding the second channel layer, a third source/drain epitaxial structure and a fourth source/drain epitaxial structure connected to the second channel layer. A portion of the ILD layer is sandwiched between the first and third source/drain epitaxial structures. The backside gate rail is under the ILD layer and is electrically connected to the gate structure. The portion of the ILD layer is directly above the backside gate rail.

Abstract: A metallic ferroelectric metal (MFM) field effect transistor (FET) is provided that includes an MFM, a first FET and a second FET. The MFM has a first electrode. The first FET is electrically connected to the first electrode, and has a first gate electrode, wherein the first gate electrode has a first area. The second FET is electrically connected to the first electrode, and has a second gate electrode, wherein the second gate electrode has a second area, and the first area and the second area have a ratio therebetween ranging from 1:50 to 1:2.

Abstract: A source-body self-aligned method of a VDMOSFET is provided. A pad layer and an unoxidized material layer are sequentially formed on an epitaxial layer on a semiconductor substrate. A lithography process is then carried out for patterning. Later, a thermal oxidation process is employed such that the unoxidized material layer is oxidized to form oxidation layers. Then, a source ion implantation process is performed, and a wet etching is used to remove the oxidation layers before successively employing a body ion implantation process. By using the process method disclosed in the present invention, it achieves to form the source region and the body region which are self-aligned. Meanwhile, since process complexity of the invention is relatively low, process uniformity and process cost can be optimally controlled. In addition, the invention achieves to reduce channel length and on-resistance, thereby enhancing the reliability effectively.

Abstract: A method for recognizing a motion state of an object by using a millimeter wave radar having at least one antenna is disclosed. The method includes the following steps. A region is set to select an object in the region, wherein the object has M ranges and M azimuths between the object and the at least one antenna during a first motion time. Each of the M ranges and the M azimuths are projected on a two-dimensional (2D) plane to form M frames. The M frames are sequentially arranged into a first consecutive candidate frames having a time sequence. The first consecutive candidate frames are inputted into an artificial intelligence model to determine a motion state type of the first consecutive candidate frames.

Abstract: A microfluidic test system and method are provided. The microfluidic test system includes a control apparatus and a microfluidic chip. The control apparatus stores a test protocol of a biomedical test. The microfluidic chip includes a top plate and a microelectrode dot array having a plurality of microelectrode devices connected in series. The control apparatus provides a location-sensing signal to the microfluidic chip so that each microelectrode device detects a capacitance value between the top plate and the corresponding microfluidic electrode accordingly. The control apparatus provides a clock signal to the microfluidic chip so that each microelectrode device outputs the corresponding capacitance value accordingly. The control apparatus determines the size and location of a test sample within the microfluidic chip, generates a control signal according to the test protocol, the size, and the location, and provides the control signal to the microfluidic chip.

Abstract: A system and method for LiDAR defogging is disclosed. The method comprises: applying a detection device to determine the fog status and generate a histogram; determining the fog concentration between a target location and the detection device in the histogram according to the histogram; and applying a defogging method to defog the fog concentration between the target location and the detecting device.

Abstract: Provided is a method for improving would healing, including administering an effective amount of a chemokine C-C motif ligand 7 (CCL7) antagonist to a subject in need thereof to inhibit CCL7 activity.

Abstract: A portable video display apparatus that adopts a L-layer processing architecture and performs the following operations for each layer of x1th layer to x2th layer: generating an optical flow map between a first and a second image frames, generating a primary rectified feature map according to a first feature map of the first image frame and the optical flow map, generating an advanced rectified feature map according to the optical flow map, the primary rectified feature map, and a second feature map of the second image frame, and generating a second feature map for the next layer according to the second feature map and the advanced rectified feature map. The portable video display apparatus generates an enlarged image frame by up-sampling the second image frame, generates a display image frame according to the second feature map at the x2+1th layer and the enlarged image frame and displays it.

Abstract: A method includes following steps. First transistors are formed over a substrate. An interconnect structure is formed over the plurality of first transistors. A dielectric layer is formed over the interconnect structure. 2D semiconductor seeds are formed over the dielectric layer. The 2D semiconductor seeds are annealed. An epitaxy process is performed to laterally grow a plurality of 2D semiconductor films respectively from the plurality of 2D semiconductor seeds. Second transistors are formed on the plurality of 2D semiconductor films.

Abstract: A method includes forming a first conductive feature over a first semiconductor structure; forming a first dielectric layer over the first conductive feature and the first semiconductor structure; removing a portion of the first dielectric layer to expose a top surface of the first conductive feature; forming a second conductive feature over a second semiconductor structure, wherein the first and second conductive features comprise nanotwinned copper; forming a second dielectric layer over the second conductive feature and the second semiconductor structure, wherein the second dielectric layer comprises a same material as the first dielectric layer; removing a portion of the second dielectric layer to expose a top surface of the second conductive feature; and performing a hybrid bonding process to bond the first dielectric layer to the second dielectric layer and bond the first conductive feature to the second conductive feature.

Abstract: An image sensor chip with depth information is provided. The image sensor chip includes an SPAD array, a time-to-digital converter module, a storage circuit, and a data processing circuit. The SPAD array includes a plurality of image sensor units, and each of the image sensor units includes a plurality of SPAD units and a decision circuit, wherein each of the SPAD units outputs a photon detection result within a scan period, and the decision circuit generates an image-sensing signal based on the photon detection results. The time-to-digital converter module generates a plurality of first time data in response to the image-sensing signals. The storage circuit stores the first time data temporarily. The data processing unit reads the first time data from the storage circuit and generates a plurality of second time data in response to the first time data.

Abstract: A biomarker includes acrolein-protein conjugate (Acr-PC). An assay kit includes an antibody capable of binding to the biomarker for diagnosing nephropathy, monitoring the progression of nephropathy, or assessing the therapeutic response of nephropathy. The antibody includes a heavy chain having the amino acid sequence of SEQ ID NO:1 and a light chain having the amino acid sequence of SEQ ID NO:2.

Abstract: Provided is a method for preventing or treating a peripheral arterial disease (PAD) in a subject in need thereof, including administering an effective amount of a chemokine C-C motif ligand 7 (CCL7) antagonist to the subject to inhibit CCL7 activity.

Abstract: The present invention is related to a method and pharmaceutical composition for treating a cartilage damage in a subject (including a human or an animal), particularly osteoarthritis (OA), using extracellular vesicles (EVs) with SOX9 gene, called as “EV-SOX9”. The EV-SOX9 is obtained by encapsulating the SOX9 mRNA or the mRNA of its upstream and downstream gene in EVs, naïve EVs with high expression level of SOX9 mRNA or its upstream and downstream gene from different cell sources, or MSC-derived EV-SOX9, which is obtained by transferring the SOX9 gene or its upstream and downstream gene into a multipotent cell and collecting EVs.

Abstract: A method of forming augmented corpus related to articulation disorder includes acquiring target speech feature data from a target corpus; acquiring training speech feature data from training corpora; training a conversion model to make it capable of converting training speech feature data into a respective output that is similar to the target speech feature data; receiving an augmenting source corpus and acquiring augmenting source speech feature data therefrom; converting, by the conversion model thus trained, the augmenting source speech feature data into converted speech feature data; and synthesizing the augmented corpus based on the converted speech feature data.

Abstract: A method includes following steps. A dielectric layer is formed over a substrate. A transition metal-containing layer is deposited on the dielectric layer. The transition metal-containing layer is patterned into a plurality of transition metal-containing pieces. The transition metal-containing pieces are sulfurized or selenized to form a plurality of semiconductor seeds. Semiconductor films are grown from semiconductor seeds. Transistors are formed on the semiconductor films.

Abstract: A method includes forming a first conductive feature and a second conductive feature over a first substrate, wherein the first and second conductive features comprise nano-twinned copper; and depositing a first metal cap layer over the first conductive feature and a second metal cap layer over the second conductive feature, wherein the first metal cap layer is spaced apart from the second metal cap layer in a cross-sectional view.

Abstract: A semiconductor device includes a substrate, a 2-D material layer, source/drain contacts, and a gate electrode. The 2-D material layer is over the substrate, the 2-D material layer includes source/drain regions and a channel region between the source/drain regions, in which the 2-D material layer is made of a transition metal dichalcogenide (TMD). The source/drain contacts are in contact with source/drain regions of the 2-D material layer, in which a binding energy of transition metal atoms at the channel region of the 2-D material layer is different from a binding energy of the transition metal atoms at the source/drain regions of the 2-D material layer. The gate electrode is over the substrate.

Abstract: A device for analyzing gas emitted from skin includes: an enclosure for collecting the gas emitted from skin, the enclosure having: an inlet through which a carrier gas is flown; and an outlet through which the carrier gas and the gas emitted from skin is flown into a vertical gas sensor, such that the vertical gas sensor has: a substrate; a collector layer; an emitter layer positively biased relative to the collector; a metal grid with a metal layer having openings, the metal grid located in between, but not in direct contact with, the collector and emitter; and an organic semiconductor (OSC) layer located in between the collector and emitter.