Abstract: A method for fabricating a multichip module includes attaching a first integrated circuit to a silicon circuit board. Bonding pads on the first integrated circuit are wire-bonded to a first set of contacts on the circuit board. A second integrated circuit is adhesively attached onto the top of the first integrated circuit. The second integrated circuit includes a recessed bottom surface to provide an overhang over the first integrated circuit which exposes the bonding pads on the top surface of the first integrated circuit. Then bonding pads on the second integrated circuit are wire-bonded to a second set of contacts on the circuit board.
Type:
Grant
Filed:
May 24, 1996
Date of Patent:
September 8, 1998
Assignee:
nChip, Inc.
Inventors:
David B. Tuckerman, Nicholas E. Brathwaite, Paul Marella, Kirk Flatow
Abstract: A device and method for burn-in of bare chips prior to assembly into a multichip module. Each die to be tested is positioned with its I/O pads positioned to face an interconnection burn-in test substrate which may be a silicon circuit board. Each die is temporarily electrically connected to the substrate by a deformable solder bump.
Abstract: A device and method for burn-in of bare chips prior to assembly into a multichip module. Each die to be tested is positioned with its I/O pads positioned to face an interconnection burn-in test substrate which may be a silicon circuit board. Each die is temporarily electrically connected to the substrate by a deformable solder bump.
Abstract: A multichip module for interconnecting a plurality of integrated circuits. A thick layer of silicon dioxide, up to 20 .mu.m, serves as a dielectric to separate metal signal layers from power and ground planes The silicon dioxide layer is deposited to have a residual compressive stress of less than 2.times.10.sup.9 dynes/cm.sup.2, and preferably less than 1.times.10.sup.9 dynes/cm.sup.2, to prevent cracking.
Abstract: An assembly structure and process for attaching integrated circuits to multichip modules and attaching the module to a printed circuit board. An epoxy loaded with diamond dust or boron nitride is used to attach the integrated circuit to the module. The dust material increases the thermal conductance of the epoxy for improved heat dissipation without substantially increasing the capacitance of interconnect routed underneath the epoxy. Reverse wedge wire bonding is also used to electrically connect the integrated circuit to the module allowing greater chip densities on the module surface. The chip/module assembly can then be mounted on a printed circuit board and the module leads wired directly to the board.
Type:
Grant
Filed:
December 17, 1990
Date of Patent:
June 1, 1993
Assignee:
nCHIP, Inc.
Inventors:
Bruce M. McWilliams, Nicholas E. Brathwaite, David B. Tuckerman
Abstract: An integral decoupling capacitor for a multichip module. The capacitor is formed over a support base material which need not be conductive. A first plate is formed by deposition of an anodizable metal. The metal is then anodized to form a dielectric layer. A second layer of metal is then formed over the dielectric layer. The formation of the capacitor over the surface of the wafer allows modules to be inventoried. Direct contact to the metal forming the capacitor plates relieves the support base from any requirement to be conductive.
Type:
Grant
Filed:
December 17, 1990
Date of Patent:
July 28, 1992
Assignee:
nCHIP, Inc.
Inventors:
David B. Tuckerman, Pandharinath A. Mhaskar