Patents Assigned to NEC Corporation
-
Patent number: 5587019Abstract: This apparatus comprises a reactor having an inner container made of quartz, a transparent quartz window at the upper end of said reactor, a gas supply pipe for supplying a reactive gas into said reactor and an exhaust pipe for exhausting the gas remaining in the reactor. The apparatus also comprises an infrared lamp house rotatably mounted over the quartz window, and having therein a multiplicity of infrared lamps and a transparent quartz window at the lower end of the lamp house facing the quartz window of the reactor. Since the semiconductor substrate in the reactor is uniformly heated by the isolated lamp house, it is not subjected to dust that can be given off from the rotating lamp house, nor to the turbulence of the reactive gas, thereby allowing uniform growth of a semiconductor crystal on the substrate.Type: GrantFiled: February 23, 1993Date of Patent: December 24, 1996Assignee: NEC CorporationInventor: Koji Fujie
-
Patent number: 5587999Abstract: A D channel packet communication system and a method of D channel packet communication in a private branch exchange allows connection control information conversion for a D channel packet which passes through a network, without call processor processing. The connection control information of D channel packet, such as a TEI, a LCGN and LCN, independently allocated for a communication between a packet terminal and a PBX (line side), and for a communication between the PBX and a network (network side) is adequately converted by the conversion control unit. The conversion control unit has first conversion information based on conditions of the connection control information to be used at the line side and at the network side, and derives second conversion information corresponding to each packet communication based on the first conversion information and connection control information contained in a packet of each packet communication.Type: GrantFiled: August 14, 1995Date of Patent: December 24, 1996Assignee: NEC CorporationInventor: Koji Endo
-
Patent number: 5587590Abstract: The invention provides a test piece of a thin film shaped material to be inspected for inspecting crystal structure thereof with an X-ray diffraction process. A width of the test piece is smaller than a diameter of a particle of phase transition material having phase-transited, and the test piece of a thin film-shaped material to be inspected is surrounded by an insulator, dielectric or oxide film. The test piece enables inspection of a crystal structure of thin film metal silicide by means of an X-ray diffraction process without lowering a diffraction intensity of the X-rays.Type: GrantFiled: November 3, 1994Date of Patent: December 24, 1996Assignee: NEC CorporationInventor: Yoshihisa Matsubara
-
Patent number: 5587610Abstract: A semiconductor device is constituted by a semiconductor substrate of a first conductivity type. An associated circuit element has a first electrode, a second electrode, and an impurity diffusion region of a second conductivity type formed in the semiconductor substrate and connected to the second electrode. An insulating layer is formed to cover the circuit element, and a conductive layer is formed on the insulating layer to cover the circuit element and thereby conceals the first and second electrodes and the impurity diffusion region of the circuit element. An aperture is selectively formed in the conductive layer such that respective parts of the first and second electrodes and the impurity diffusion region are exposed through the aperture, enabling transmission of electrons through the aperture and facilitating testing by an electron beam tester.Type: GrantFiled: October 26, 1994Date of Patent: December 24, 1996Assignee: NEC CorporationInventor: Masayuki Watanabe
-
Patent number: 5587808Abstract: An image processing device according to the present invention comprises a picture element extraction circuit for extracting picture signals in a matrix area composed of picture signals corresponding to density of pixels of an image, a first area determination circuit for determining whether the image in the matrix area is in a photo area or a provisional character area, a second area determination circuit for determining whether or not the image is a dot image, and a third area determination circuit. The first area determination circuit determines whether the matrix area is the provisional character area or the photo area based on the maximum and minimum values of picture signals in the matrix area. The second area determination circuit detects a continuous edge from picture signals of picture elements in the primary scanning direction and the secondary scanning direction in the matrix area.Type: GrantFiled: May 31, 1995Date of Patent: December 24, 1996Assignee: NEC CorporationInventors: Hayato Hagihara, Takahiro Hongu
-
Patent number: 5587897Abstract: An optimization device comprising a function for inputting an objective function to be optimized, a required precision required for optimizing and a search region for the optimal solution to make the objective function into a convex function, a function for inputting the convex objective function to start the search of the optimal solution from the search region of the optimal solution, and a function for detecting the optimal solution based on the detected search start point.Type: GrantFiled: December 27, 1994Date of Patent: December 24, 1996Assignee: NEC CorporationInventor: Kazuhiro Iida
-
Patent number: 5588024Abstract: The invention provides a frequency subband encoding apparatus wherein the amount of comparison operation processing of a bit allocator is minimized. A subband filter divides a PCM signal into and outputs a plurality of frequency subbands. A SMR calculator calculates, for each of the frequency subbands, an SMR which is a ratio between a signal level and a mask level. A bit allocator calculates a reference NMR which is a value obtained by subtracting, from an SMR of the entire frequency band, a S/N ratio calculated from a reference bit number to be allocated to one of the frequency subbands which exhibits a maximum SMR, and adjusts the reference NMR to perform bit allocation to the frequency subbands.Type: GrantFiled: September 25, 1995Date of Patent: December 24, 1996Assignee: NEC CorporationInventor: Hideto Takano
-
Patent number: 5588039Abstract: In a mobile communication system, a plurality of mobile base stations and a home memory station are connected directly to an integrated service digital network (ISDN) without mobile control stations. Connection between the mobile base stations is established by the ISDN.Type: GrantFiled: June 13, 1994Date of Patent: December 24, 1996Assignee: NEC CorporationInventors: Kazuko Ohkubo, Masahiko Yahagi
-
Patent number: 5587344Abstract: The invention provides a method and an apparatus for fabricating a semiconductor device having a silicon oxynitride layer deposited on a semiconductor substrate by means of plasma-enhanced chemical vapor deposition with radio-frequency field being applied to the semiconductor substrate. The method and apparatus use a silane gas, an argon gas and a nitrogen gas as process gases on condition that a flow rate ratio of the argon gas to the silane and nitrogen gases is in the range of at least 1.1, and preferably 2.0 or less. The method and apparatus preferably further use an oxygen gas on condition that a flow rate ratio of the nitrogen gas to the oxygen and nitrogen gases is in the range of at least 0.25, and preferably 0.6 or less. By controlling flow rate ratios of the above mentioned gases in the above mentioned range, the invention provides a silicon oxynitride layer having enhanced burying characteristic and water-permeability resistance and also having smaller dielectric constant and layer stress.Type: GrantFiled: April 26, 1995Date of Patent: December 24, 1996Assignee: NEC CorporationInventor: Hiraku Ishikawa
-
Patent number: 5587667Abstract: An output buffer circuit is provided, which enables to reduce the delay of a digital output signal with respect to an input digital signal. The output buffer circuit includes first and second FETs serially connected to each other. A gate of the first FET is applied with a first digital input signal. A gate of the second FET is applied with a second digital input signal. The first and second FETs operate to be opposite or complementary in logic state to each other. A digital output signal is taken out from a connection point of the first and second FETs. The circuit further includes a current source for causing a bias current having the same direction or polarity as that of a drain current of the first FET to flow through the first FET in the pseudo-OFF state. A turn-on speed of the first FET from the pseudo-OFF state to the ON state is enhanced by the bias current.Type: GrantFiled: December 19, 1995Date of Patent: December 24, 1996Assignee: NEC CorporationInventors: Daijiro Inami, Yuichi Sato
-
Patent number: 5587326Abstract: In a bipolar junction transistor of an epitaxial planar type comprising a base region, an emitter region formed in the base region, and a poly-silicon layer as an emitter poly-silicon electrode layer overlying the emitter region, the poly-silicon layer being used as an impurity diffusion source for forming the emitter region in fabrication of the transistor, the emitter poly-silicon electrode layer comprises a poly-silicon film containing an additive of one of C, O, and P overlying the emitter region and a poly-silicon layer overlying the poly-silicon film. An impurity is doped in the poly-silicon layer and is diffused into the base region through the poly-silicon film to form the emitter region in the base region in fabrication of the transistor. The poly-silicon film contains the additive and serves to prevent the poly-silicon film and the poly-silicon layer from grain growth which badly affects the impurity diffusion for forming the emitter region.Type: GrantFiled: October 23, 1992Date of Patent: December 24, 1996Assignee: NEC CorporationInventor: Hisashi Takemura
-
Patent number: 5584724Abstract: In an electrical jumper connector unit having two connectors connecting two electronic circuit boards included in an information processing apparatus, there are a first connector, a plate, a second connector fixed on the plate, and plural discrete cables connecting both the two connectors in a shell las a casing of the electrical jumper connector unit. The plate is included in the shell so as to move in any direction within a predetermined range relative to the shell, and a pair of knobs is fixed to the plate so as to protrude from a pair of openings of the shell. When the pair of the knobs moves in any direction within the predetermined range to the shell, the second connector fixed to the plate moves in the same way. When the second connector fixed to the plate agrees with an external output connector fixed on one of the two electronic circuit boards, the motion of the pair of the knobs discontinues.Type: GrantFiled: February 21, 1995Date of Patent: December 17, 1996Assignee: NEC CorporationInventors: Junichiro Shibata, Yosuke Kuroki, Kyosuke Takeuchi, Yasufumi Hayashi, Osamu Takagi
-
Patent number: 5586138Abstract: A semiconductor laser is provided which is capable of generating a train of ultrashort light pulses with an ultrahigh repetition frequency and which is useful in optical communications and optical information processing. The semiconductor laser is a mode-locked semiconductor laser which has two resonator cavities which are formed by two facets and a distributed feedback structure between these two facets. The length of the resonator cavity formed between one facet and the distributed feedback structure is 1/m (where m is an integer) of the length of the resonator cavity formed by the other facet and the distributed feedback structure. A saturable absorption region and a high-frequency modulation region are provided within the longer of the resonator cavities. By making the high-frequency modulation frequency be equal to the round trip frequency of the light within the longer resonator cavity, mode-locked operation is achieved.Type: GrantFiled: April 6, 1995Date of Patent: December 17, 1996Assignee: NEC CorporationInventor: Hiroyuki Yokoyama
-
Patent number: 5586000Abstract: The present invention provides a solid electrolytic capacitor comprising a metal having a dielectric oxide film formed thereon, a conductive polymer compound layer formed on said dielectric oxide film, a conductive paste layer formed on said conductive polymer compound layer, a molded resin sheathing having all of the above members buried therein, and a pair of electrodes connected to said metal and said conductive paste layer, respectively, in which capacitor an antioxidant is scattered, in the form of particles, in at least one of said conductive polymer compound layer, said conductive paste layer and the interface between the conductive polymer compound layer and the conductive paste layer; and a process for production of said capacitor.Type: GrantFiled: December 21, 1994Date of Patent: December 17, 1996Assignee: NEC CorporationInventors: Koji Sakata, Maki Minamoto, Takashi Fukaumi, Toshihiko Nishiyama, Satoshi Arai, Hiromichi Taniguchi
-
Patent number: 5585662Abstract: A breakable fuse element is incorporated in a semiconductor integrated circuit device, and is overlain by a multi-level insulating film structure having the lowest insulating film covering the breakable fuse element and a multi-level insulating sub-structure over the lowest insulating film, wherein an etching stopper is inserted between the lowest insulating film and the multi-level insulating film sub-structure so that an etching for a laser hole is exactly terminated at the etching stopper, thereby exactly controlling the remaining thickness over the breakable fuse element.Type: GrantFiled: June 21, 1994Date of Patent: December 17, 1996Assignee: NEC CorporationInventor: Hisao Ogawa
-
Patent number: 5586001Abstract: In a solid electrolyte capacitor in which the solid electrolyte is polyaniline or a polymer of an aniline derivative doped with a prototnic acid, a disulfonic acid represented by the general formula (1) is used as the protonic acid to enhance high-temperature endurance and humidity resistance of the solid electrolyte: ##STR1## where R is m-phenylene, p-phenylene or a C.sub.7 to C.sub.10 bridged cycloalkylene group, and n and m are independently integers from 1 to 3. Disulfonic acids of the general formula (1) are novel compounds.Type: GrantFiled: August 16, 1995Date of Patent: December 17, 1996Assignee: NEC CorporationInventors: Kosuke Amano, Hitoshi Ishikawa, Etsuo Hasegawa
-
Patent number: 5584395Abstract: A sorting apparatus has a rotatable drum member having sorting through-holes selectively open and closed by associated shutter plates, and semiconductor devices examined by a testing system are sequentially stored in the sorting through-holes: when one of the sorting through-holes is aligned with a storage box for the decided grade, the shutter plate is opened, and the semiconductor device is thrown into the storage box.Type: GrantFiled: March 21, 1995Date of Patent: December 17, 1996Assignee: NEC CorporationInventor: Yasuaki Homma
-
Patent number: 5586047Abstract: Input of only circuit configuration data of datapath section cells constructing datapath section leads to an automatic determination of configurations at cell level of peripheral circuit corresponding to the datapath section for subsequent determinations of the layout of datapath circuit layout from configuration data and netlists of the peripheral circuit, the datapath section cells and the standard cells. It is not necessary to prepare the peripheral circuit function descriptive library according to the configuration data of the datapath sections. This facilitates the creation of the layout of the datapath circuit and reduces the necessary time for creating the same because all the descriptive levels may be unified to the cell level.Type: GrantFiled: October 7, 1994Date of Patent: December 17, 1996Assignee: NEC CorporationInventor: Masahiko Imahashi
-
Patent number: 5586056Abstract: A data transmitter/receiver of a centralized monitoring station transmits data and receives data from each of monitored stations. A polling level table stores polling levels calculated from request data level and transmission data level added to transmission data from the monitored stations. A monitored station number table stores the numbers of monitored stations to be polled with a polling-level equal to or greater than 2 in one polling cycle. A polling level determining unit determines polling levels to be transmitted to the respective monitored stations based on the contents of the polling level table and the monitored station number table. A data transmitter/receiver of each of the monitored stations transmits transmission data level corresponding to the polling level and transmission data with the added request data level to the centralized monitoring station.Type: GrantFiled: November 10, 1994Date of Patent: December 17, 1996Assignee: NEC CorporationInventor: Gaku Watanabe
-
Patent number: 5585754Abstract: An integrated digital circuit includes an oscillation circuit comprising basic gate circuits having the number of stages proportional to the number of gates existing in the critical path of a synchronized circuit network and capable of controlling an oscillating frequency by at least one control signal line. A synchronized circuit network constructed with basic gate circuits capable of controlling the delay time by at least one control signal line operates synchronously by an oscillation signal transfer line. A control circuit controls the oscillation circuit and the synchronized circuit network using the control signal line so that the frequency of signal input from an externally input signal line is equalized with the frequency of signal from the oscillation circuit.Type: GrantFiled: April 4, 1994Date of Patent: December 17, 1996Assignee: NEC CorporationInventors: Masakazu Yamashina, Masayuki Mizuno