Abstract: A nonvolatile memory device wherein the detection output of a comparator detector remains stable without oscillating even when the output of a sense amplifier enters an Insensitive zone which is a detection disable region of the comparator detector. The nonvolatile semiconductor memory device includes a comparator detector for comparing the output of a sense amplifier with a reference value, a coincidence detection circuit for detecting that erasure of a memory cell has been completed, and a low-pass filter interposed between the output of the comparator detector and an input of the coincidence detection circuit. By selection of a suitable time constant of the low-pass filter, oscillation waveforms of the output of the comparator detector can be prevented from being transmitted to the coincidence detection circuit, and completion of erasure can be detected accurately by the coincidence detection circuit.

Abstract: In a semiconductor integrated logic circuit, latch circuits are provided to hold the input signal supplied to a random logic circuit just before an operation mode is switched from a normal operation mode to a test operation mode. During the test operation mode, the latched signals are continued to be supplied to random logic circuit so that the operation condition of a internal circuit of the random logic circuit is maintained as it is. Therefore, when the circuit is returned from the test operation mode to the normal operation mode, the circuit operation of the internal circuit of the random logic circuit continuing from the circuit operation in the previous normal operation condition can be obtained.

Abstract: A method of removing a metal impurity, including the steps of: removing oxygen dissolved in a hydrofluoric-acid-containing chemical solution; and in order to remove a metal impurity contained in the hydrofluoric-acid-containing chemical solution free from the dissolved oxygen, bringing or circulating the hydrofluoric-acid-containing chemical solution into contact with or in a column filled with silicon granules to adsorb the metal impurity on the silicon granules.

Abstract: Disclosed is an electrostrictive effect element comprising a columnar casing having openings on either end, laminated blocks with a laminated ceramic capacitor structure. The laminated blocks are stacked in the casing and electrically connected to each other and have a sufficient number of electrostrictive material layers formed to prevent mechanically damaged due to stress generated when a voltage is applied. The electrostrictive effect also includes means which is disposed outside the casing and made of a spring or the like for applying a compressive force to said laminated blocks in the lamination direction thereof, and engaging members which are engaged with said laminated blocks for applying a compressive force through said compression means to said laminated blocks.

Abstract: A color picture tube grid apparatus includes a mask, a frame, and a belt-like metal plate. The mask is constituted by an array of a large number of stretched grid elements defining a large number of slit holes. The frame has a pair of side frame portions for supporting the mask at two end portions of each of the grid elements in a stretching direction. The belt-like metal plate is in contact with end portions of the grid elements and arranged on at least one of two end portions of the mask to cross the array of grid elements.

Abstract: A semiconductor integrated circuit device comprises a complementary inverter implemented by a series combination of a p-channel enhancement type switching transistor and an n-channel enhancement type switching transistor, and a multi-level wiring structure coupled between the drain nodes of the two switching transistors and a capacitive load, wherein the multi-level wiring structure comprises a lower level wiring strip coupled at both ends thereof with the drain nodes through two sets of contact holes, and an upper level wiring strip coupled at both ends thereof with the lower level wiring strip through two contact holes so that both charge and discharge currents bi-directionally flow the upper and lower wiring strips, thereby enhancing the resistance against electro-migration.

Abstract: A full color liquid crystal driver which includes a line memory for dividing an input video signal for each horizontal scan period into n groups and expanding each divided signal to n folds, n amplifiers for amplifying the output signals of the line memory to be voltages necessary to drive a liquid crystal display element, and n signal output circuits. Given that the number of horizontal pixels of the liquid crystal display element is x and the horizontal scan period is t, the necessary operation frequency for the amplifiers and signal output circuits becomes 1/(n(t/x)), which is lower by 1/n than the operation frequency necessary for the amplifiers and signal output circuits of prior art. In the case where the number of horizontal pixels is significantly increased in a conventional active matrix type liquid crystal display element, providing full color display requires very-fast amplifiers and very-fast signal output circuits for applying a voltage to the liquid crystal display element.

Abstract: A floor-planning system of the present invention prepares a block diagram showing blocks and the connection status among the blocks. The floor-planning system inputs a block diagram, estimates the block sizes, and estimates the aspect ratio range possible for the blocks. The system refers to the estimated block sizes and the estimated aspect ratios to specify the shapes and the arrangement of the blocks in the layout area. The system displays the block arrangement and the connection status among the blocks. The block layout is stored as layout data and utilized in feasibility judgment for a layout area on an LSI or a PCB.

Abstract: A PAL encoder comprises phase converter, first and second low-pass filters, a burst signal adder, a chrominance subcarrier generator, and a modulator. The phase converter converts digital first and second color-difference signals into digital U-axis and V-axis signals. The first and second low-pass filters pass low-frequency components of the digital U-axis and V-axis signals to produce band-rejected U-axis and V-axis signals, respectively. The burst signal adder adds a predetermined burst signal to the band-rejected U-axis and V-axis signals to produce burst-added U-axis and V-axis signals, respectively. The chrominance subcarrier generator outputs digital sine and cosine signals of the chrominance subcarrier. The modulator multiplies the burst-added U-axis signal by the sine signal and the burst-added V-axis signal by the cosine signal and adds the multiplied results to produce a digital chroma signal.

Abstract: In order to individually charge subscribers of a local area network (LAN) or LAN's, a charging apparatus is used in the LAN or in bridge apparatus interconnecting the LAN's to accumulate charges by counting subscriber packets transmitted therethrough as transmission packets additionally including particular packets for use regardless of intentions of the subscribers and includes a memory section in which type field values are preliminarily stored to indicate the particular packets. For one of the transmission packets, an address memory area is loaded with source and destination addresses included in the packet under consideration. A field value memory area is loaded with a type field value included in the packet in question.

Abstract: A lead frame includes outer leads each having a thinner portion made by coining, for example, so that a prefabricated tip is formed thereat before the soldering process by cutting the thinner portion. The prefabricated tip is coated with the solder at the soldering stage. Therefore, it is easy to provide stable and reliable connections of leads thus formed to pads of a printed circuit board to mount a semiconductor device having the leads on the printed circuit board.

Abstract: In a service area of a mobile telephone system, there are plural base radio stations. A mobile radio station in the service area broadcasts a request signal of zone registration. All the base stations in the service area receive this request signal, measure the field intensity of the signal, and transmit the value of the measured intensity to the mobile radio station. The mobile radio station transmits a response signal to a base radio station where the field intensity is the highest. This response signal is reported to a radio channel control unit where the contents of the zone register is revised in accordance with the reported response.

Abstract: On a first conductor layer of a capacitor element of an IC and in contact with a dielectric film made of a particular dielectric material, a first barrier metal film is made of platinum, palladium, tantalum, or titanium nitride. A second barrier metal film is made of a similar material in contact with the dielectric film and on a second conductor layer. The particular dielectric material is either tantalum oxide or a perovskite oxide, such as strontium titanate or a composite of lead zirconate and lead titanate. In cooperation with such a dielectric film, the first and the second barrier metal films make it possible to provide a compact capacitor having a great and reliable capacitance. The capacitor element is manufactured like a conventional one except for use of the particular dielectric material and for manufacturing steps of forming the first and the second barrier metal films and may be an MOS, MIS, or MIM capacitor or a multilayer wired capacitor.

Abstract: A semiconductor memory device comprises a plurality of word lines (WL1, WL2), a plurality of bit lines (BL1, BL"), a plurality of memory cells (MC11, MC12) each includes a transistor (9) formed on a first semiconductor region (3) and having a floating gate (6), a control gate (8) connected to one of said word lines, a source region (5s) and a drain region (5d) connected to a first end of one of said bit lines, and further comprises a source line (SL) having a first capacitance thereof different from a second capacitance which is associated with said bit lines (BL1, BL2) and having a first end thereof connected to said source region, a first bias means (14) for charging said bit lins and said source line via said first semicondictor region to a high voltage level (Vcc) during a first time period and supplying a low voltage level (Vss) to said first semiconductor region during a second time period thereafter, wherein said low voltage level causes a voltage difference and a current between said source and drain

Abstract: A discharge portion of an ion laser tube is formed of either amorphous carbon or crystalline graphite member having an amorphous carbon layer on its surface.

Abstract: Disclosed herein is a semiconductor device having a substrate, an insulating layer covering the substrate, a plurality of wiring layer formed on the insulating layer, each wiring layer having a top surface and a side surface, and a sidewall insulating film formed on and along the side surface of each of the wiring layers. The sidewall insulating film suppresses a hillock projecting from the side surface of each wiring layer.

Abstract: In an apparatus for driving a liquid crystal display panel having signal lines and scan lines, the operation of a signal line driving circuit for sequentially driving the signal lines is started by a horizontal start timing signal which is obtained by delaying a horizontal synchronization signal with a first time period. Also, the operation of a scan line driving circuit for sequentially driving the scan lines is started by a vertical start timing signal which is obtained by delaying a vertical synchronization signal with a second time period. The first time period and the second time period are changed in accordance with a size of one frame of a video signal.

Abstract: In a memory cell having a pair of driving transistors each formed of a bulk type N channel MOS transistor and a pair of load transistors each formed of a P channel thin film transistor, a capacitor is connected between a gate electrode and a drain of each of the thin film transistors. With this arrangement, it is to ameliorate immunity from a soft error caused by an external disturbance such as a-rays.

Abstract: A line accommodation circuit for use in combination with a cell exchange apparatus to convert a sequence of input data signals into a sequence of asynchronous transfer mode cells is provided with two function systems which are identical in structure. The systems receive the input data signals in parallel and are switched from an active system to a standby system by a switching operation indicated by a system controller. Switching is affected by inserting a test cell in the active system after a last one of the asynchronous transfer mode cell held in the active system, and placed in the standby system before a following asynchronous transfer mode cell. The test cell is first detected by the standby system and thereafter by the active system, at which time the next asynchronous transfer mode cells are sent from the standby system which is rendered into a new active system.

Abstract: A dynamic random access memory device is subjected to a diagnosis upon completion of fabrication to see whether or not a defective memory cell is incorporated in memory cell sub-arrays, one of the input/output data buffer circuits incorporated therein transfers test bits in serial to a shift register which in turn transfers the test bits in parallel to data line pairs for writing the test bits into the memory cell sub-arrays, and a comparator compares the test bits read out from the memory cell sub-arrays with the test bit stored in the shift register for producing a diagnostic signal indicative of consistence or inconsistence between the test bits read out from the memory cell sub-arrays and the test bits in the shift register, thereby allowing an external diagnostic system with data pins less than the input/output data buffer circuits to carry out the diagnosis.