Patents Assigned to NEC Electronics
  • Patent number: 7944411
    Abstract: To equalize the intensity of light emitted by display elements on a display device, a plurality of current-drive circuits are connected in cascade through two terminals of each of the current-drive circuits, each comprising a reference current generation section including a reference resistor and a plurality of current drive sections. Reference current sunk by an external reference current source causes a voltage drop across the reference resistor, and the voltage drop is applied across a current adjustment resistor In response to an image signal, the current-drive circuit outputs current, determined by multiplying each of a plurality of internal reference currents by an optional factor and summing the resulting currents to the display elements. Since the magnitude of the internal reference current flowing inside the current-drive circuit can be varied by varying the value of the current adjustment resistor, gamma correction can be applied to drive current with high accuracy.
    Type: Grant
    Filed: January 30, 2004
    Date of Patent: May 17, 2011
    Assignee: NEC Electronics
    Inventor: Yutaka Saeki
  • Patent number: 7463122
    Abstract: A compact via transmission line for a printed circuit board having preferred characteristic impedance and capable of miniaturizing the printed circuit board including a multilayer printed circuit board, and extending the frequency range of a via transmission line mounted on the printed circuit board, and a design method of the same. The transmission line has a central conductor forming an inner conductor layer boundary make up a signal via hole, a plurality of via holes arranged around the central conductor form an outer conductor layer boundary, and a plurality of conductor plates formed of a printed circuit board conductor layer, is further provided with a constitutive parameter adjustment clearance hole between the inner and outer conductor layer boundaries of the compact via transmission line, and electrically isolates to prevent cross-talk of a signal propagating through a signal via hole with other signals in a high-frequency signal band.
    Type: Grant
    Filed: June 1, 2004
    Date of Patent: December 9, 2008
    Assignees: NEC Corporation, NEC Electronics
    Inventors: Taras Kushta, Kaoru Narita, Takanori Saeki, Tomoyuki Kaneko, Hirokazu Tohya
  • Publication number: 20030111339
    Abstract: A plating system in which a plating process of a semiconductor substrate held by a wafer holder provided on the top of a plating tank is conducted while jetting the plating liquid upward from the lower side in the plating tank, wherein a plurality of nozzles for removing bubbles adhered on the surface of the semiconductor substrate are provided in the tank so that the plating liquid is jetted from the nozzles to the semiconductor substrate.
    Type: Application
    Filed: December 11, 2002
    Publication date: June 19, 2003
    Applicant: NEC Electronics
    Inventor: Hidehiko Kawaguchi