Patents Assigned to NEC Machinery Corporation
  • Publication number: 20070131162
    Abstract: The object of the present invention is to provide a compact and inexpensive single-crystal growth apparatus. The single-crystal growth apparatus of the present invention which comprises spheroid mirrors 11, 12, heat sources 13, 14 located at the one foci F1, F2 of the spheroid mirrors 11, 12, a quartz tube 16 enclosing a heating zone 15 of the common focus F0 on the other side, and, in the quartz tube 16, a feed rod 18 supported by an upper crystal drive shaft 17 and a seed crystal rod 20 supported by a lower crystal drive shaft 19. The interfocal distance between the foci F1, F2 and the foci F0 is made 41.4-67.0 mm and the minor axis/major axis ratio of the spheroid mirrors is set to 0.90-0.95.
    Type: Application
    Filed: February 4, 2005
    Publication date: June 14, 2007
    Applicants: Nec Machinery Corporation, National Inst of Adv. Industrial Sci. and Tech
    Inventors: Hiroshi Nishimura, Toru Nagasawa, Ryusuke Iwasaki, Shinichi Ikeda, Naoki Shirakawa, Hiroshi Eisaki, Norio Umeyama, Yoshiyuki Yoshida, Ichirou Nagai, Shigeo Hara
  • Patent number: 6787378
    Abstract: A method is provided that allows a simple and inexpensive apparatus to measure the uniformity of the height-directional positions of spheres or hemispheres such as bump electrodes of a semiconductor device. The degree of focus is calculated from an image of bump electrodes 11a and 11b acquired at a first focusing position F1 using an imaging system. After that, the bump electrodes 11a and 11b and the imaging system is relatively moved closer or farther, and then the degree of focus is calculated from an image acquired at a second focusing position F2. The degrees of focus at these two focusing positions F1 and F2 are compared with each other. As a result, detected are the contour lines of the horizontal cross sections of the bump electrodes 11a and 11b at the height (F1+F2)/2 of the position of equal degree of focus indicated by PQ. On the basis of the shapes and/or sizes thereof, the height-directional positions of the bump electrodes 11a and 11b are measured.
    Type: Grant
    Filed: October 8, 2003
    Date of Patent: September 7, 2004
    Assignee: NEC Machinery Corporation
    Inventors: Akira Ishii, Jun Mitsudo
  • Patent number: 6770544
    Abstract: A substrate, such as a semiconductor wafer, is cut without using a dicer or an adhesive sheet. A semiconductor wafer 1 formed with a number of elements 2 is drawn and held by an x-y table 4, and ultrashort pulse laser 7 having a pulse width of not more than 1 picosecond is irradiated along scribed lines between the elements 2 to cut the same.
    Type: Grant
    Filed: February 20, 2002
    Date of Patent: August 3, 2004
    Assignee: NEC Machinery Corporation
    Inventor: Hiroshi Sawada
  • Patent number: 6750776
    Abstract: A method for diagnosing a fabrication machine for a semiconductor device, in which damage condition of components for fast driving can be recognized and failure of the components can be predicted, and the machine are provided. Vibration information of a drive member is sent from a motor controller for controlling a motor connected to the drive member to a machine controller. The vibration information is stored in an information storage in the machine controller and operated in an operational processor, and condition of the drive member according to the operation results is displayed on a display unit at any time. Therefore, when some failure occurs in the drive member, the specifics can be known with the display unit without need for connecting a special analyzer or PC to the fabrication machine for a semiconductor device. Consequently, the machine is capable for self-diagnosing, and thus trouble of the drive member can be prevented from happening.
    Type: Grant
    Filed: February 27, 2002
    Date of Patent: June 15, 2004
    Assignee: NEC Machinery Corporation
    Inventor: Yukihiro Tonomura
  • Patent number: 6628818
    Abstract: Based on the result of image recognition of the first wafer, the scan area of image recognition in the second and later wafers is determined. For example, in an appearance inspection process of semiconductor pellets, the first wafer is scanned over for image recognition to determine a contour (hereinafter referred to as the polygon) of a set constituted by pellets excluding non-shaped pellets as the scan area for the second and later wafers. This allows for reducing the scan area for the second and later wafers, thereby eliminating unnecessary areas to scan and saving time and costs required for the work.
    Type: Grant
    Filed: March 30, 2000
    Date of Patent: September 30, 2003
    Assignee: NEC Machinery Corporation
    Inventors: Haruyuki Nakano, Wen Jye Chang
  • Patent number: 6561743
    Abstract: A pellet picking apparatus for separating a pellet adhered on an adhesive sheet from the sheet and picking the pellet thus separated is provided, which prevents the pellet from being damaged during the pellet picking process without lowering the productivity. This apparatus comprises (a) a stage having a surface with which a lower face of the adhesive sheet is contacted; the pellet being adhered on an upper face of the sheet; the stage having a suction hole that pulls down the sheet; the suction hole having a suction end to be contacted with the sheet on the surface of the stage; the stage being movable in a horizontal plane with respect to a specific reference position; and (b) a collet for holding the pellet by a suction force; the collet having a suction end to be contacted with the pellet; the collet being capable of holding the pellet by the suction force at the suction end.
    Type: Grant
    Filed: November 8, 2000
    Date of Patent: May 13, 2003
    Assignee: Nec Machinery Corporation
    Inventor: Akira Nakatsu
  • Patent number: 6546985
    Abstract: A die bonder, to which semiconductor pellets 4 are supplied in an arranged state, comprises a substrate feeding mechanism for feeding a substrate 1 including a plurality of pellet islands to successively set the pellet island at a bonding position BP, a defective substrate detecting means 3 for detecting defective pellet island, and a pellet transfer mechanism. The pellet transfer mechanism successively picks up and carries a defective pellet to the bonding position BP for mounting when a pellet island of the substrate set at the bonding position is non-defective, and mounts a defective pellet 4a when a pellet island is defective. In this arrangement, when the defective substrate detecting means determines that a pellet island is defective, a defective pellet is mounted.
    Type: Grant
    Filed: August 16, 1999
    Date of Patent: April 15, 2003
    Assignee: NEC Machinery Corporation
    Inventor: Toru Aoki
  • Patent number: 6462533
    Abstract: An IC test system includes a socket having a plurality of contact pins, a positioning member for positioning an IC package for testing, a carriage arm for transferring the IC package positioned by the positioning member to the socket. The socket, positioning member and the carriage arm are fixed to the base of the test system via a common base plate. Vibration caused by the carriage arm is commonly transferred to the socket and the positioning member, whereby a suitable alignment of IC package with respect to the socket can be obtained.
    Type: Grant
    Filed: November 28, 2000
    Date of Patent: October 8, 2002
    Assignee: NEC Machinery Corporation
    Inventor: Jun Shimizu
  • Patent number: 6445201
    Abstract: Coordinate data for the array pattern of contact pins and coordinate data for the array pattern of solder balls of an IC package is stored by a positioning section of an IC package testing device. The position of a BGA is adjusted so that the contact pins and the solder balls accurately overlap each other. The solder balls of the IC package are abutted on the respective contact pins while the IC package is sucked onto by a suction head. Then, the solder balls are abutted on the respective contact pins with an optimal load while measuring a load applied to the IC package by load cells.
    Type: Grant
    Filed: August 16, 2000
    Date of Patent: September 3, 2002
    Assignee: NEC Machinery Corporation
    Inventors: Jun Simizu, Akio Horimoto